ATE396450T1 - System und verfahren zur reduzierten ausführung von befehlen mit unzuverlässigen daten in einem spekulativen prozessor - Google Patents

System und verfahren zur reduzierten ausführung von befehlen mit unzuverlässigen daten in einem spekulativen prozessor

Info

Publication number
ATE396450T1
ATE396450T1 AT02776309T AT02776309T ATE396450T1 AT E396450 T1 ATE396450 T1 AT E396450T1 AT 02776309 T AT02776309 T AT 02776309T AT 02776309 T AT02776309 T AT 02776309T AT E396450 T1 ATE396450 T1 AT E396450T1
Authority
AT
Austria
Prior art keywords
processor
instructions
execution
data
speculative
Prior art date
Application number
AT02776309T
Other languages
English (en)
Inventor
Christopher Wilkerson
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE396450T1 publication Critical patent/ATE396450T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Communication Control (AREA)
AT02776309T 2001-11-05 2002-10-25 System und verfahren zur reduzierten ausführung von befehlen mit unzuverlässigen daten in einem spekulativen prozessor ATE396450T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/992,881 US7114059B2 (en) 2001-11-05 2001-11-05 System and method to bypass execution of instructions involving unreliable data during speculative execution

Publications (1)

Publication Number Publication Date
ATE396450T1 true ATE396450T1 (de) 2008-06-15

Family

ID=25538847

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02776309T ATE396450T1 (de) 2001-11-05 2002-10-25 System und verfahren zur reduzierten ausführung von befehlen mit unzuverlässigen daten in einem spekulativen prozessor

Country Status (8)

Country Link
US (1) US7114059B2 (de)
EP (1) EP1442364B1 (de)
JP (1) JP3810407B2 (de)
CN (1) CN100541423C (de)
AT (1) ATE396450T1 (de)
DE (1) DE60226763D1 (de)
TW (1) TW589576B (de)
WO (1) WO2003040916A1 (de)

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US7496732B2 (en) * 2003-12-17 2009-02-24 Intel Corporation Method and apparatus for results speculation under run-ahead execution
US20050223201A1 (en) * 2004-03-30 2005-10-06 Marc Tremblay Facilitating rapid progress while speculatively executing code in scout mode
US7490229B2 (en) 2004-03-30 2009-02-10 Sun Microsystems, Inc. Storing results of resolvable branches during speculative execution to predict branches during non-speculative execution
US7257700B2 (en) 2004-06-03 2007-08-14 Sun Microsystems, Inc. Avoiding register RAW hazards when returning from speculative execution
US20060090061A1 (en) * 2004-09-30 2006-04-27 Haitham Akkary Continual flow processor pipeline
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US7664942B1 (en) * 2008-08-25 2010-02-16 Sun Microsystems, Inc. Recovering a subordinate strand from a branch misprediction using state information from a primary strand
US20110047357A1 (en) * 2009-08-19 2011-02-24 Qualcomm Incorporated Methods and Apparatus to Predict Non-Execution of Conditional Non-branching Instructions
US8433885B2 (en) * 2009-09-09 2013-04-30 Board Of Regents Of The University Of Texas System Method, system and computer-accessible medium for providing a distributed predicate prediction
US10698859B2 (en) 2009-09-18 2020-06-30 The Board Of Regents Of The University Of Texas System Data multicasting with router replication and target instruction identification in a distributed multi-core processing architecture
KR101731752B1 (ko) * 2010-06-18 2017-04-28 보드 오브 리전츠 더 유니버시티 오브 텍사스 시스템 결합된 분기 타깃 및 프레디킷 예측
US9443085B2 (en) 2011-07-19 2016-09-13 Elwha Llc Intrusion detection using taint accumulation
US9798873B2 (en) * 2011-08-04 2017-10-24 Elwha Llc Processor operable to ensure code integrity
US9170843B2 (en) 2011-09-24 2015-10-27 Elwha Llc Data handling apparatus adapted for scheduling operations according to resource allocation based on entitlement
US9298918B2 (en) 2011-11-30 2016-03-29 Elwha Llc Taint injection and tracking
US9575903B2 (en) 2011-08-04 2017-02-21 Elwha Llc Security perimeter
US9558034B2 (en) 2011-07-19 2017-01-31 Elwha Llc Entitlement vector for managing resource allocation
US9460290B2 (en) 2011-07-19 2016-10-04 Elwha Llc Conditional security response using taint vector monitoring
US9465657B2 (en) 2011-07-19 2016-10-11 Elwha Llc Entitlement vector for library usage in managing resource allocation and scheduling based on usage and priority
US9471373B2 (en) 2011-09-24 2016-10-18 Elwha Llc Entitlement vector for library usage in managing resource allocation and scheduling based on usage and priority
US9223710B2 (en) 2013-03-16 2015-12-29 Intel Corporation Read-write partitioning of cache memory
US10061583B2 (en) * 2014-12-24 2018-08-28 Intel Corporation Systems, apparatuses, and methods for data speculation execution
US9916164B2 (en) * 2015-06-11 2018-03-13 Intel Corporation Methods and apparatus to optimize instructions for execution by a processor
US10768936B2 (en) 2015-09-19 2020-09-08 Microsoft Technology Licensing, Llc Block-based processor including topology and control registers to indicate resource sharing and size of logical processor
US10719321B2 (en) 2015-09-19 2020-07-21 Microsoft Technology Licensing, Llc Prefetching instruction blocks
US10198263B2 (en) 2015-09-19 2019-02-05 Microsoft Technology Licensing, Llc Write nullification
US10776115B2 (en) 2015-09-19 2020-09-15 Microsoft Technology Licensing, Llc Debug support for block-based processor
US11016770B2 (en) 2015-09-19 2021-05-25 Microsoft Technology Licensing, Llc Distinct system registers for logical processors
US10871967B2 (en) 2015-09-19 2020-12-22 Microsoft Technology Licensing, Llc Register read/write ordering
US11977891B2 (en) 2015-09-19 2024-05-07 Microsoft Technology Licensing, Llc Implicit program order
US10452399B2 (en) 2015-09-19 2019-10-22 Microsoft Technology Licensing, Llc Broadcast channel architectures for block-based processors
US11126433B2 (en) 2015-09-19 2021-09-21 Microsoft Technology Licensing, Llc Block-based processor core composition register
US10180840B2 (en) 2015-09-19 2019-01-15 Microsoft Technology Licensing, Llc Dynamic generation of null instructions
US10678544B2 (en) 2015-09-19 2020-06-09 Microsoft Technology Licensing, Llc Initiating instruction block execution using a register access instruction
US10108549B2 (en) 2015-09-23 2018-10-23 Intel Corporation Method and apparatus for pre-fetching data in a system having a multi-level system memory
US10261901B2 (en) 2015-09-25 2019-04-16 Intel Corporation Method and apparatus for unneeded block prediction in a computing system having a last level cache and a multi-level system memory
US10095637B2 (en) * 2016-09-15 2018-10-09 Advanced Micro Devices, Inc. Speculative retirement of post-lock instructions
US10628157B2 (en) * 2017-04-21 2020-04-21 Arm Limited Early predicate look-up
US10929141B1 (en) 2018-03-06 2021-02-23 Advanced Micro Devices, Inc. Selective use of taint protection during speculative execution
US11741196B2 (en) 2018-11-15 2023-08-29 The Research Foundation For The State University Of New York Detecting and preventing exploits of software vulnerability using instruction tags
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US20220197813A1 (en) * 2020-12-23 2022-06-23 Intel Corporation Application programming interface for fine grained low latency decompression within processor core
US12242851B2 (en) 2021-09-09 2025-03-04 Intel Corporation Verifying compressed stream fused with copy or transform operations
US12417182B2 (en) 2021-12-14 2025-09-16 Intel Corporation De-prioritizing speculative code lines in on-chip caches
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Also Published As

Publication number Publication date
CN1582429A (zh) 2005-02-16
JP3810407B2 (ja) 2006-08-16
CN100541423C (zh) 2009-09-16
EP1442364A1 (de) 2004-08-04
TW589576B (en) 2004-06-01
WO2003040916A1 (en) 2003-05-15
US20030088759A1 (en) 2003-05-08
DE60226763D1 (de) 2008-07-03
JP2005508546A (ja) 2005-03-31
EP1442364B1 (de) 2008-05-21
US7114059B2 (en) 2006-09-26

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