ATE406613T1 - Effiziente umschaltung zwischen priorisierten tasks - Google Patents

Effiziente umschaltung zwischen priorisierten tasks

Info

Publication number
ATE406613T1
ATE406613T1 AT05826687T AT05826687T ATE406613T1 AT E406613 T1 ATE406613 T1 AT E406613T1 AT 05826687 T AT05826687 T AT 05826687T AT 05826687 T AT05826687 T AT 05826687T AT E406613 T1 ATE406613 T1 AT E406613T1
Authority
AT
Austria
Prior art keywords
tasks
priorized
switching
memory stack
efficient switching
Prior art date
Application number
AT05826687T
Other languages
English (en)
Inventor
Marcus Heijligers
Eleonora Juhasz
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE406613T1 publication Critical patent/ATE406613T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/451—Code distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
  • Devices For Executing Special Programs (AREA)
  • Power Steering Mechanism (AREA)
  • Vehicle Body Suspensions (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
AT05826687T 2004-11-30 2005-11-24 Effiziente umschaltung zwischen priorisierten tasks ATE406613T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04106190 2004-11-30

Publications (1)

Publication Number Publication Date
ATE406613T1 true ATE406613T1 (de) 2008-09-15

Family

ID=36228556

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05826687T ATE406613T1 (de) 2004-11-30 2005-11-24 Effiziente umschaltung zwischen priorisierten tasks

Country Status (7)

Country Link
US (1) US20080098398A1 (de)
EP (1) EP1820100B1 (de)
JP (1) JP2008522277A (de)
CN (1) CN100535862C (de)
AT (1) ATE406613T1 (de)
DE (1) DE602005009398D1 (de)
WO (1) WO2006072841A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007026095A (ja) * 2005-07-15 2007-02-01 Matsushita Electric Ind Co Ltd 並列演算装置
US8032889B2 (en) * 2006-04-05 2011-10-04 Maxwell Technologies, Inc. Methods and apparatus for managing and controlling power consumption and heat generation in computer systems
US8276132B1 (en) * 2007-11-12 2012-09-25 Nvidia Corporation System and method for representing and managing a multi-architecture co-processor application program
US8281294B1 (en) * 2007-11-12 2012-10-02 Nvidia Corporation System and method for representing and managing a multi-architecture co-processor application program
JP5155336B2 (ja) * 2008-01-15 2013-03-06 カーネロンシリコン株式会社 タスク処理装置
CN101290591B (zh) * 2008-06-03 2011-10-12 北京中星微电子有限公司 一种嵌入式操作系统中切换任务的方法和单元
CN101290590B (zh) * 2008-06-03 2012-01-11 北京中星微电子有限公司 一种嵌入式操作系统中切换任务的方法和单元
FR2942556B1 (fr) * 2009-02-24 2011-03-25 Commissariat Energie Atomique Unite d'allocation et de controle
US20120192147A1 (en) * 2011-01-25 2012-07-26 Argen Wong Develop real time software without an RTOS

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4286322A (en) * 1979-07-03 1981-08-25 International Business Machines Corporation Task handling apparatus
US4435780A (en) * 1981-06-16 1984-03-06 International Business Machines Corporation Separate stack areas for plural processes
GB2191612A (en) * 1986-06-11 1987-12-16 Ibm Display terminal
JPH02271435A (ja) * 1989-04-13 1990-11-06 Mitsubishi Electric Corp タスクトレース装置
US5161226A (en) * 1991-05-10 1992-11-03 Jmi Software Consultants Inc. Microprocessor inverse processor state usage
EP0706126A1 (de) * 1994-10-07 1996-04-10 International Business Machines Corporation Aufgabenablaufplanung gemäss Prioritätsstufen
WO1997005550A1 (en) * 1995-07-27 1997-02-13 Intel Corporation Protocol for arbitrating access to a shared memory area using historical state information
US6128728A (en) * 1997-08-01 2000-10-03 Micron Technology, Inc. Virtual shadow registers and virtual register windows
US6243735B1 (en) * 1997-09-01 2001-06-05 Matsushita Electric Industrial Co., Ltd. Microcontroller, data processing system and task switching control method
US6157989A (en) * 1998-06-03 2000-12-05 Motorola, Inc. Dynamic bus arbitration priority and task switching based on shared memory fullness in a multi-processor system
JP4072271B2 (ja) * 1999-02-19 2008-04-09 株式会社日立製作所 複数のオペレーティングシステムを実行する計算機
US6993018B1 (en) * 1999-08-03 2006-01-31 Telefonaktiebolaget Lm Ericsson (Publ) Priority signaling for cell switching
FR2799081B1 (fr) * 1999-09-27 2002-02-22 Cit Alcatel Procede et dispositif de gestion des circuits de transmission d'un reseau
JP3641997B2 (ja) * 2000-03-30 2005-04-27 日本電気株式会社 プログラム変換装置及び方法並びに記録媒体
US6822959B2 (en) * 2000-07-31 2004-11-23 Mindspeed Technologies, Inc. Enhancing performance by pre-fetching and caching data directly in a communication processor's register set
US6751711B1 (en) * 2000-10-27 2004-06-15 Nortel Networks Limited Methods and systems for process rollback in a shared memory parallel processor computing environment
GB2369464B (en) * 2000-11-27 2005-01-05 Advanced Risc Mach Ltd A data processing apparatus and method for saving return state
US20030014474A1 (en) * 2001-05-30 2003-01-16 Mckaig Ray S. Alternate zero overhead task change circuit
EP1391820A3 (de) * 2002-07-31 2007-12-19 Texas Instruments Incorporated Gleichzeitige Taskausführung in einer Mehrfachprozessorumgebung mit einzelnem Betriebssystem
US20050015768A1 (en) * 2002-12-31 2005-01-20 Moore Mark Justin System and method for providing hardware-assisted task scheduling
WO2004072852A1 (en) * 2003-02-11 2004-08-26 Thomson Licensing S.A. Asynchronous communications technique
US7487502B2 (en) * 2003-02-19 2009-02-03 Intel Corporation Programmable event driven yield mechanism which may activate other threads
DE10353267B3 (de) * 2003-11-14 2005-07-28 Infineon Technologies Ag Multithread-Prozessorarchitektur zum getriggerten Thread-Umschalten ohne Zykluszeitverlust und ohne Umschalt-Programmbefehl
US7904905B2 (en) * 2003-11-14 2011-03-08 Stmicroelectronics, Inc. System and method for efficiently executing single program multiple data (SPMD) programs

Also Published As

Publication number Publication date
WO2006072841A3 (en) 2006-10-12
US20080098398A1 (en) 2008-04-24
EP1820100B1 (de) 2008-08-27
WO2006072841A2 (en) 2006-07-13
DE602005009398D1 (de) 2008-10-09
CN100535862C (zh) 2009-09-02
CN101065728A (zh) 2007-10-31
EP1820100A2 (de) 2007-08-22
JP2008522277A (ja) 2008-06-26

Similar Documents

Publication Publication Date Title
WO2004114128A3 (en) Instruction controlled data processing device
WO2009029549A3 (en) Method and apparatus for fine grain performance management of computer systems
WO2006068943A3 (en) Method and apparatus for supporting soft real-time behavior
WO2006032001A3 (en) Methods and system for executing a program in multiple execution environments
TW200617680A (en) Establishing command order in an out of order DMA command queue
JP2004070956A5 (de)
WO2009072030A3 (en) Method of operating a medical device
HK1201109A1 (en) Systems and methods for dynamic adaptation of network accelerators
WO2005069155A3 (en) Method and apparatus for task schedulin in a multi-processor system based on memory requirements
BRPI0418204A (pt) dispositivo eletrÈnico equipado com interface de voz, método para executar as configurações do idioma de interface do usuário no dispositivo eletrÈnico, e, programa de computador
ATE406613T1 (de) Effiziente umschaltung zwischen priorisierten tasks
WO2008108129A1 (ja) メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム
EP1365321A3 (de) Mehrprozessorsystem
WO2005072444A3 (en) Intelligent memory device
WO2006069484A8 (en) Methods and apparatuses to maintain multiple execution contexts
WO2005078575A3 (en) Sharing idled processor execution resources
WO2007076098A3 (en) Digital effects analysis in modeling environments
ATE509449T1 (de) Verfahren und vorrichtung zur planung von datenpaketströmen
WO2005066764A3 (en) Data layout mechanism to reduce hardware resource conflicts
TW200625172A (en) Interrupt control
WO2005066768A3 (en) Behavioral model based multi-threaded architecture
WO2007076190A3 (en) Efficient task scheduling by assigning fixed registers to scheduler
ATE486321T1 (de) Priorisierung von interrupts in einer speichersteuerung
TWI256591B (en) Method of reducing interrupts
EP1808766A3 (de) Mikrocomputer mit Befehlscachespeicher

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties