ATE409993T1 - Übergangsfehler basierte jitterschätzung - Google Patents

Übergangsfehler basierte jitterschätzung

Info

Publication number
ATE409993T1
ATE409993T1 AT03771568T AT03771568T ATE409993T1 AT E409993 T1 ATE409993 T1 AT E409993T1 AT 03771568 T AT03771568 T AT 03771568T AT 03771568 T AT03771568 T AT 03771568T AT E409993 T1 ATE409993 T1 AT E409993T1
Authority
AT
Austria
Prior art keywords
input signal
error based
transition region
desired transition
transition error
Prior art date
Application number
AT03771568T
Other languages
English (en)
Inventor
Casper Dietrich
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE409993T1 publication Critical patent/ATE409993T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/205—Arrangements for detecting or preventing errors in the information received using signal quality detector jitter monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Optical Radar Systems And Details Thereof (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AT03771568T 2002-07-25 2003-07-03 Übergangsfehler basierte jitterschätzung ATE409993T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/206,378 US7028205B2 (en) 2002-07-25 2002-07-25 Techniques to monitor transition density of an input signal

Publications (1)

Publication Number Publication Date
ATE409993T1 true ATE409993T1 (de) 2008-10-15

Family

ID=30770267

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03771568T ATE409993T1 (de) 2002-07-25 2003-07-03 Übergangsfehler basierte jitterschätzung

Country Status (8)

Country Link
US (1) US7028205B2 (de)
EP (1) EP1532763B1 (de)
CN (1) CN100563141C (de)
AT (1) ATE409993T1 (de)
AU (1) AU2003249724A1 (de)
DE (1) DE60323844D1 (de)
TW (1) TWI250721B (de)
WO (1) WO2004012382A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8982938B2 (en) * 2012-12-13 2015-03-17 Intel Corporation Distortion measurement for limiting jitter in PAM transmitters
US9240848B2 (en) * 2014-06-09 2016-01-19 Tyco Electronics Corporation Eye quality monitoring system and method
KR102694373B1 (ko) * 2022-12-30 2024-08-13 주식회사 포인투테크놀로지 Ｐａｍ 신호의 레벨 미스매치를 조정하기 위한 장치 및 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420904A (en) 1992-07-21 1995-05-30 Gulick; Dale E. Signal averager
US5432480A (en) * 1993-04-08 1995-07-11 Northern Telecom Limited Phase alignment methods and apparatus
US5481563A (en) * 1994-03-14 1996-01-02 Network Systems Corporation Jitter measurement using a statistically locked loop
TW382703B (en) * 1997-03-14 2000-02-21 Hitachi Ltd Signal recording method, phase difference detecting circuit, and information apparatus
US6347128B1 (en) * 1998-07-20 2002-02-12 Lucent Technologies Inc. Self-aligned clock recovery circuit with proportional phase detector
WO2001006696A1 (en) * 1999-07-16 2001-01-25 Conexant Systems, Inc. Apparatus and method for servo-controlled self-centering phase detector
US6531927B1 (en) * 2000-10-03 2003-03-11 Lsi Logic Corporation Method to make a phase-locked loop's jitter transfer function independent of data transition density
EP1225698B1 (de) * 2001-01-22 2004-08-18 Lucent Technologies Inc. Verfahren und Anordnung zur Korrektur der Taktphase in einem Datenempfänger mit einem Hogge oder Alexander Phasendiskriminator
US6973147B2 (en) * 2002-09-04 2005-12-06 Intel Corporation Techniques to adjust a signal sampling point

Also Published As

Publication number Publication date
CN100563141C (zh) 2009-11-25
WO2004012382A1 (en) 2004-02-05
AU2003249724A1 (en) 2004-02-16
DE60323844D1 (de) 2008-11-13
EP1532763A1 (de) 2005-05-25
US7028205B2 (en) 2006-04-11
CN1685654A (zh) 2005-10-19
TWI250721B (en) 2006-03-01
EP1532763B1 (de) 2008-10-01
TW200423532A (en) 2004-11-01
US20040017870A1 (en) 2004-01-29

Similar Documents

Publication Publication Date Title
DE602005013565D1 (de) Zwei-bit-a-/d-wandler mit versatzlöschung, verbesserter gleichtaktunterdrückung und schwellensensitivität
MX2010001526A (es) Dispositivo de circuito y metodo para medir inestabilidad de reloj.
TW200623145A (en) Pseudo-synchronization of the transportation of data across asynchronous clock domains
ATE538535T1 (de) Digitale frequenzgeregelte verzögerungsleitung
WO2004110078A3 (en) Receiver based saturation estimator
TW200700755A (en) System and scanout circuits with error resilience circuit
TW200630892A (en) High speed analog envelope detector
WO2007120610A3 (en) System and method for combining signals on a differential i/o link
WO2008027066A3 (en) Clock and data recovery
TW200711385A (en) Access node selection in a network
TW200627808A (en) Digital signal processor, receiver, corrector and methods for the same
EP1187360A3 (de) Digitaler Echounterdrücker
TW200513824A (en) Synchronizer apparatus for synchronizing data from one clock domain to another clock domain
TW200601699A (en) Latch circuit
EP1603293A3 (de) Empfänger für optische Signale mit einem Viterbi-Entzerrer und einer Vorrichtung zur Parameterschätzung
TW200644420A (en) Apparatus and methods for adaptive trip point detection
DE60239832D1 (de) Benutzerprioritätsmodus
TW200721692A (en) Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by a frequency synthesizer
ATE409993T1 (de) Übergangsfehler basierte jitterschätzung
DE602005024421D1 (de) Mechanismus zur bandbreitenauswahl in einer optischen empfängerschaltung
WO2006034122A3 (en) Viterbi decoder with direct current restoration
TW200603619A (en) Interference detecting circuit for use in ATSC system and method thereof
MY147612A (en) Signal quality estimation and control system
TW200515728A (en) Retraining derived clock receivers
AU2003265895A1 (en) Techniques to adjust a signal sampling point

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties