ATE420459T1 - Ätzen von dotiertem sio2 mit hoher selektivität zu undotiertem sio2 mittels eines plasmaätzgerätes mit hoher dichte - Google Patents
Ätzen von dotiertem sio2 mit hoher selektivität zu undotiertem sio2 mittels eines plasmaätzgerätes mit hoher dichteInfo
- Publication number
- ATE420459T1 ATE420459T1 AT98938028T AT98938028T ATE420459T1 AT E420459 T1 ATE420459 T1 AT E420459T1 AT 98938028 T AT98938028 T AT 98938028T AT 98938028 T AT98938028 T AT 98938028T AT E420459 T1 ATE420459 T1 AT E420459T1
- Authority
- AT
- Austria
- Prior art keywords
- silicon dioxide
- sio2
- density plasma
- high density
- etch
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
- H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
Landscapes
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US1998/015520 WO2000005756A1 (en) | 1998-07-23 | 1998-07-23 | Method of etching doped silicon dioxide with selectivity to undoped silicon dioxide with a high density plasma etcher |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE420459T1 true ATE420459T1 (de) | 2009-01-15 |
Family
ID=22267559
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT98938028T ATE420459T1 (de) | 1998-07-23 | 1998-07-23 | Ätzen von dotiertem sio2 mit hoher selektivität zu undotiertem sio2 mittels eines plasmaätzgerätes mit hoher dichte |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP1110238B1 (de) |
| JP (1) | JP3902726B2 (de) |
| KR (1) | KR100521506B1 (de) |
| AT (1) | ATE420459T1 (de) |
| AU (1) | AU8664298A (de) |
| DE (1) | DE69840455D1 (de) |
| WO (1) | WO2000005756A1 (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100714401B1 (ko) | 2006-02-08 | 2007-05-04 | 삼성전자주식회사 | 적층된 트랜지스터를 구비하는 반도체 장치 및 그 형성방법 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4807016A (en) * | 1985-07-15 | 1989-02-21 | Texas Instruments Incorporated | Dry etch of phosphosilicate glass with selectivity to undoped oxide |
| KR930005440B1 (ko) * | 1989-10-02 | 1993-06-21 | 다이닛뽕 스쿠린 세이소오 가부시키가이샤 | 절연막의 선택적 제거방법 |
| US5286677A (en) * | 1993-05-07 | 1994-02-15 | Industrial Technology Research Institute | Method for etching improved contact openings to peripheral circuit regions of a dram integrated circuit |
| US5935877A (en) * | 1995-09-01 | 1999-08-10 | Applied Materials, Inc. | Etch process for forming contacts over titanium silicide |
| US5626716A (en) * | 1995-09-29 | 1997-05-06 | Lam Research Corporation | Plasma etching of semiconductors |
-
1998
- 1998-07-23 JP JP2000561652A patent/JP3902726B2/ja not_active Expired - Fee Related
- 1998-07-23 EP EP98938028A patent/EP1110238B1/de not_active Expired - Lifetime
- 1998-07-23 AU AU86642/98A patent/AU8664298A/en not_active Abandoned
- 1998-07-23 DE DE69840455T patent/DE69840455D1/de not_active Expired - Lifetime
- 1998-07-23 WO PCT/US1998/015520 patent/WO2000005756A1/en not_active Ceased
- 1998-07-23 AT AT98938028T patent/ATE420459T1/de not_active IP Right Cessation
- 1998-07-23 KR KR10-2001-7001121A patent/KR100521506B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| AU8664298A (en) | 2000-02-14 |
| KR20010106418A (ko) | 2001-11-29 |
| JP3902726B2 (ja) | 2007-04-11 |
| DE69840455D1 (de) | 2009-02-26 |
| EP1110238A1 (de) | 2001-06-27 |
| WO2000005756A1 (en) | 2000-02-03 |
| KR100521506B1 (ko) | 2005-10-12 |
| EP1110238B1 (de) | 2009-01-07 |
| JP2002521819A (ja) | 2002-07-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4255230A (en) | Plasma etching process | |
| EP0167136B1 (de) | Selektives anisotropisches reaktives Ionenätzverfahren für zusammengesetzte Strukturen aus Polysiliziden | |
| KR101377866B1 (ko) | 고 종횡비 피처들 및 연관된 구조체들을 형성하기 위한 선택적 식각 화학물들 | |
| US4734157A (en) | Selective and anisotropic dry etching | |
| KR940000913B1 (ko) | 플라즈마 에칭에 관한 원상태 포토레지스트의 캡핑방법 | |
| EP0036144B1 (de) | Verfahren zum selektiven reaktiven Ionenätzen von Silicium | |
| US5994232A (en) | Etching method for use in fabrication semiconductor device | |
| US5453156A (en) | Anisotropic polysilicon plasma etch using fluorine gases | |
| KR20010042106A (ko) | 고밀도 플라즈마 공정 시스템에서 기판의 실리콘층에트렌치를 형성하는 기술 | |
| JP3351183B2 (ja) | シリコン基板のドライエッチング方法及びトレンチ形成方法 | |
| US5209803A (en) | Parallel plate reactor and method of use | |
| JPH11121438A (ja) | プラズマエッチング方法 | |
| US5922622A (en) | Pattern formation of silicon nitride | |
| US6117788A (en) | Semiconductor etching methods | |
| US5387312A (en) | High selective nitride etch | |
| US6399515B1 (en) | Plasma etch method for forming patterned chlorine containing plasma etchable silicon containing layer with enhanced sidewall profile uniformity | |
| US4364793A (en) | Method of etching silicon and polysilicon substrates | |
| US6069087A (en) | Highly selective dry etching process | |
| US6877517B2 (en) | Plasma etch method for forming plasma etched silicon layer | |
| KR20030072522A (ko) | 반도체 웨이퍼의 건식 식각 방법 | |
| TW374203B (en) | A method for forming a fine contact hole in a semiconductor device | |
| ATE420459T1 (de) | Ätzen von dotiertem sio2 mit hoher selektivität zu undotiertem sio2 mittels eines plasmaätzgerätes mit hoher dichte | |
| US6521539B1 (en) | Selective etch method for selectively etching a multi-layer stack layer | |
| JPH04237125A (ja) | ドライエッチング方法 | |
| JPS646276B2 (de) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |