ATE421146T1 - 1t1c-sram - Google Patents

1t1c-sram

Info

Publication number
ATE421146T1
ATE421146T1 AT04778150T AT04778150T ATE421146T1 AT E421146 T1 ATE421146 T1 AT E421146T1 AT 04778150 T AT04778150 T AT 04778150T AT 04778150 T AT04778150 T AT 04778150T AT E421146 T1 ATE421146 T1 AT E421146T1
Authority
AT
Austria
Prior art keywords
dram
memory
sram
write
providing
Prior art date
Application number
AT04778150T
Other languages
English (en)
Inventor
Jeong-Duk Sohn
Original Assignee
Zmos Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zmos Technology Inc filed Critical Zmos Technology Inc
Application granted granted Critical
Publication of ATE421146T1 publication Critical patent/ATE421146T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/24—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2218—Late write
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4065—Low level details of refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1021—Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Pens And Brushes (AREA)
  • Glass Compositions (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Static Random-Access Memory (AREA)
AT04778150T 2003-07-14 2004-07-14 1t1c-sram ATE421146T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US48750803P 2003-07-14 2003-07-14

Publications (1)

Publication Number Publication Date
ATE421146T1 true ATE421146T1 (de) 2009-01-15

Family

ID=34079377

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04778150T ATE421146T1 (de) 2003-07-14 2004-07-14 1t1c-sram

Country Status (9)

Country Link
US (1) US6937503B2 (de)
EP (1) EP1647028B1 (de)
JP (1) JP2007531956A (de)
KR (1) KR20060041232A (de)
CN (1) CN1823390A (de)
AT (1) ATE421146T1 (de)
CA (1) CA2532464A1 (de)
DE (1) DE602004019093D1 (de)
WO (1) WO2005008736A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100620643B1 (ko) * 2004-04-12 2006-09-13 주식회사 하이닉스반도체 리프레쉬를 수행하는 반도체 메모리 장치 및 그 방법
US7388248B2 (en) * 2004-09-01 2008-06-17 Micron Technology, Inc. Dielectric relaxation memory
KR101975528B1 (ko) 2012-07-17 2019-05-07 삼성전자주식회사 패스트 어레이 영역을 갖는 반도체 메모리 셀 어레이 및 그것을 포함하는 반도체 메모리
JP6378775B2 (ja) * 2014-10-22 2018-08-22 太陽誘電株式会社 再構成可能デバイス
KR102583266B1 (ko) * 2018-10-24 2023-09-27 삼성전자주식회사 스토리지 모듈, 스토리지 모듈의 동작 방법, 및 스토리지 모듈을 제어하는 호스트의 동작 방법
US12508403B2 (en) 2019-04-23 2025-12-30 ICU Medical. Inc. Catheter insertion device with improved push tab and tip protector assembly
CN115440288B (zh) * 2021-06-04 2026-07-17 中国科学院微电子研究所 写禁止时间的获取方法、装置、测试机台及存储介质

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6275437B1 (en) * 2000-06-30 2001-08-14 Samsung Electronics Co., Ltd. Refresh-type memory with zero write recovery time and no maximum cycle time
KR100367690B1 (ko) * 2000-12-04 2003-01-14 (주)실리콘세븐 디램 셀을 이용한 비동기식 에스램 호환 메모리 장치 및그 구동 방법
JP2003059264A (ja) * 2001-08-08 2003-02-28 Hitachi Ltd 半導体記憶装置
JP2003123470A (ja) * 2001-10-05 2003-04-25 Mitsubishi Electric Corp 半導体記憶装置
TW533413B (en) * 2001-10-11 2003-05-21 Cascade Semiconductor Corp Asynchronous hidden refresh of semiconductor memory

Also Published As

Publication number Publication date
CA2532464A1 (en) 2005-01-27
WO2005008736A2 (en) 2005-01-27
US20050024924A1 (en) 2005-02-03
KR20060041232A (ko) 2006-05-11
JP2007531956A (ja) 2007-11-08
EP1647028B1 (de) 2009-01-14
WO2005008736A3 (en) 2005-03-31
US6937503B2 (en) 2005-08-30
DE602004019093D1 (en) 2009-03-05
CN1823390A (zh) 2006-08-23
EP1647028A2 (de) 2006-04-19
EP1647028A4 (de) 2006-09-06

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Legal Events

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