ATE428134T1 - Verfahren und vorrichtung zur hochgeschwindigkeits-eingabeabtastung - Google Patents

Verfahren und vorrichtung zur hochgeschwindigkeits-eingabeabtastung

Info

Publication number
ATE428134T1
ATE428134T1 AT05784286T AT05784286T ATE428134T1 AT E428134 T1 ATE428134 T1 AT E428134T1 AT 05784286 T AT05784286 T AT 05784286T AT 05784286 T AT05784286 T AT 05784286T AT E428134 T1 ATE428134 T1 AT E428134T1
Authority
AT
Austria
Prior art keywords
signal
sampler
sampled
sampled signals
output
Prior art date
Application number
AT05784286T
Other languages
English (en)
Inventor
Seonghoon Lee
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE428134T1 publication Critical patent/ATE428134T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H03K5/1534—Transition or edge detectors

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
  • Steroid Compounds (AREA)
AT05784286T 2004-08-12 2005-08-11 Verfahren und vorrichtung zur hochgeschwindigkeits-eingabeabtastung ATE428134T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/918,008 US7366942B2 (en) 2004-08-12 2004-08-12 Method and apparatus for high-speed input sampling

Publications (1)

Publication Number Publication Date
ATE428134T1 true ATE428134T1 (de) 2009-04-15

Family

ID=35311572

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05784286T ATE428134T1 (de) 2004-08-12 2005-08-11 Verfahren und vorrichtung zur hochgeschwindigkeits-eingabeabtastung

Country Status (8)

Country Link
US (2) US7366942B2 (de)
EP (1) EP1776619B1 (de)
JP (1) JP2008510387A (de)
KR (1) KR20070059083A (de)
AT (1) ATE428134T1 (de)
DE (1) DE602005013789D1 (de)
TW (1) TWI300935B (de)
WO (1) WO2006020795A1 (de)

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WO2015131203A1 (en) 2014-02-28 2015-09-03 Kandou Lab, S.A. Clock-embedded vector signaling codes
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US9852806B2 (en) 2014-06-20 2017-12-26 Kandou Labs, S.A. System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding
US9112550B1 (en) 2014-06-25 2015-08-18 Kandou Labs, SA Multilevel driver for high speed chip-to-chip communications
KR102288337B1 (ko) * 2014-07-10 2021-08-11 칸도우 랩스 에스에이 증가한 신호대잡음 특징을 갖는 벡터 시그널링 코드
US9432082B2 (en) 2014-07-17 2016-08-30 Kandou Labs, S.A. Bus reversable orthogonal differential vector signaling codes
WO2016014423A1 (en) 2014-07-21 2016-01-28 Kandou Labs S.A. Multidrop data transfer
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US9674014B2 (en) 2014-10-22 2017-06-06 Kandou Labs, S.A. Method and apparatus for high speed chip-to-chip communications
KR102372931B1 (ko) 2015-06-26 2022-03-11 칸도우 랩스 에스에이 고속 통신 시스템
US10055372B2 (en) 2015-11-25 2018-08-21 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
US10242749B2 (en) 2016-04-22 2019-03-26 Kandou Labs, S.A. Calibration apparatus and method for sampler with adjustable high frequency gain
US10003454B2 (en) 2016-04-22 2018-06-19 Kandou Labs, S.A. Sampler with low input kickback
CN109314518B (zh) 2016-04-22 2022-07-29 康杜实验室公司 高性能锁相环
WO2017189931A1 (en) 2016-04-28 2017-11-02 Kandou Labs, S.A. Vector signaling codes for densely-routed wire groups
US10153591B2 (en) 2016-04-28 2018-12-11 Kandou Labs, S.A. Skew-resistant multi-wire channel
EP3449606A4 (de) 2016-04-28 2019-11-27 Kandou Labs S.A. Mehrstufiger treiber mit geringem stromverbrauch
US10193716B2 (en) 2016-04-28 2019-01-29 Kandou Labs, S.A. Clock data recovery with decision feedback equalization
US9906358B1 (en) 2016-08-31 2018-02-27 Kandou Labs, S.A. Lock detector for phase lock loop
US10411922B2 (en) 2016-09-16 2019-09-10 Kandou Labs, S.A. Data-driven phase detector element for phase locked loops
US10200188B2 (en) 2016-10-21 2019-02-05 Kandou Labs, S.A. Quadrature and duty cycle error correction in matrix phase lock loop
US10200218B2 (en) 2016-10-24 2019-02-05 Kandou Labs, S.A. Multi-stage sampler with increased gain
US10372665B2 (en) 2016-10-24 2019-08-06 Kandou Labs, S.A. Multiphase data receiver with distributed DFE
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CN116860070A (zh) 2017-02-28 2023-10-10 康杜实验室公司 多线路时偏的测量和校正方法和装置
US10116468B1 (en) 2017-06-28 2018-10-30 Kandou Labs, S.A. Low power chip-to-chip bidirectional communications
US10686583B2 (en) * 2017-07-04 2020-06-16 Kandou Labs, S.A. Method for measuring and correcting multi-wire skew
US10203226B1 (en) 2017-08-11 2019-02-12 Kandou Labs, S.A. Phase interpolation circuit
US10326623B1 (en) 2017-12-08 2019-06-18 Kandou Labs, S.A. Methods and systems for providing multi-stage distributed decision feedback equalization
US10554380B2 (en) 2018-01-26 2020-02-04 Kandou Labs, S.A. Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation
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US10601574B2 (en) 2018-06-11 2020-03-24 Kandou Labs, S.A. Skew detection and correction for orthogonal differential vector signaling codes
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Also Published As

Publication number Publication date
US20070046515A1 (en) 2007-03-01
JP2008510387A (ja) 2008-04-03
EP1776619A1 (de) 2007-04-25
US20060034405A1 (en) 2006-02-16
EP1776619B1 (de) 2009-04-08
US7366942B2 (en) 2008-04-29
TW200629282A (en) 2006-08-16
US7747890B2 (en) 2010-06-29
WO2006020795A1 (en) 2006-02-23
KR20070059083A (ko) 2007-06-11
DE602005013789D1 (de) 2009-05-20
TWI300935B (en) 2008-09-11

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