ATE430980T1 - Schaltung und verfahren zur prüfung und reparatur - Google Patents

Schaltung und verfahren zur prüfung und reparatur

Info

Publication number
ATE430980T1
ATE430980T1 AT02766724T AT02766724T ATE430980T1 AT E430980 T1 ATE430980 T1 AT E430980T1 AT 02766724 T AT02766724 T AT 02766724T AT 02766724 T AT02766724 T AT 02766724T AT E430980 T1 ATE430980 T1 AT E430980T1
Authority
AT
Austria
Prior art keywords
fuse
testing
blow
circuitry
repair
Prior art date
Application number
AT02766724T
Other languages
English (en)
Inventor
Timothy Cowles
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE430980T1 publication Critical patent/ATE430980T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/72—Masking faults in memories by using spares or by reconfiguring with optimized replacement algorithms
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Debugging And Monitoring (AREA)
AT02766724T 2001-03-15 2002-03-11 Schaltung und verfahren zur prüfung und reparatur ATE430980T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/810,366 US6904552B2 (en) 2001-03-15 2001-03-15 Circuit and method for test and repair
PCT/US2002/007270 WO2002089147A2 (en) 2001-03-15 2002-03-11 Circuit and method for memory test and repair

Publications (1)

Publication Number Publication Date
ATE430980T1 true ATE430980T1 (de) 2009-05-15

Family

ID=25203695

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02766724T ATE430980T1 (de) 2001-03-15 2002-03-11 Schaltung und verfahren zur prüfung und reparatur

Country Status (9)

Country Link
US (2) US6904552B2 (de)
EP (1) EP1368812B1 (de)
JP (1) JP4027805B2 (de)
KR (1) KR100559022B1 (de)
CN (1) CN100483557C (de)
AT (1) ATE430980T1 (de)
AU (1) AU2002338564A1 (de)
DE (1) DE60232227D1 (de)
WO (1) WO2002089147A2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6829737B1 (en) * 2000-08-30 2004-12-07 Micron Technology, Inc. Method and system for storing device test information on a semiconductor device using on-device logic for determination of test results
US20020133769A1 (en) * 2001-03-15 2002-09-19 Cowles Timothy B. Circuit and method for test and repair
US6967348B2 (en) * 2002-06-20 2005-11-22 Micron Technology, Inc. Signal sharing circuit with microelectric die isolation features
US7026646B2 (en) * 2002-06-20 2006-04-11 Micron Technology, Inc. Isolation circuit
US6943575B2 (en) * 2002-07-29 2005-09-13 Micron Technology, Inc. Method, circuit and system for determining burn-in reliability from wafer level burn-in
US20040123181A1 (en) * 2002-12-20 2004-06-24 Moon Nathan I. Self-repair of memory arrays using preallocated redundancy (PAR) architecture
US7734966B1 (en) * 2002-12-26 2010-06-08 Marvell International Ltd. Method and system for memory testing and test data reporting during memory testing
US7509543B2 (en) 2003-06-17 2009-03-24 Micron Technology, Inc. Circuit and method for error test, recordation, and repair
US6975945B2 (en) * 2003-08-26 2005-12-13 Hewlett Packard Development Company, L.P. System and method for indication of fuse defects based upon analysis of fuse test data
JP4850720B2 (ja) * 2004-02-03 2012-01-11 ネクステスト システムズ コーポレイション メモリデバイスのテストおよびプログラミングの方法並びにそのシステム
KR100699827B1 (ko) 2004-03-23 2007-03-27 삼성전자주식회사 메모리 모듈
US7219275B2 (en) * 2005-02-08 2007-05-15 International Business Machines Corporation Method and apparatus for providing flexible modular redundancy allocation for memory built in self test of SRAM with redundancy
US7457177B2 (en) 2005-12-21 2008-11-25 Infineon Technologies Ag Random access memory including circuit to compress comparison results
JP4939870B2 (ja) 2006-08-16 2012-05-30 株式会社東芝 半導体記憶装置およびそのテスト方法
US7679974B2 (en) * 2006-10-19 2010-03-16 Freescale Semiconductor, Inc. Memory device having selectively decoupleable memory portions and method thereof
US8977912B2 (en) * 2007-05-07 2015-03-10 Macronix International Co., Ltd. Method and apparatus for repairing memory
US20080291760A1 (en) * 2007-05-23 2008-11-27 Micron Technology, Inc. Sub-array architecture memory devices and related systems and methods
WO2008155805A1 (ja) * 2007-06-20 2008-12-24 Fujitsu Limited キャッシュメモリ装置、演算処理装置及びその制御方法
US20090150721A1 (en) * 2007-12-10 2009-06-11 International Business Machines Corporation Utilizing A Potentially Unreliable Memory Module For Memory Mirroring In A Computing System
US8001434B1 (en) 2008-04-14 2011-08-16 Netlist, Inc. Memory board with self-testing capability
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
JP5319387B2 (ja) * 2009-05-13 2013-10-16 ルネサスエレクトロニクス株式会社 半導体チップの救済設計方法
JP5346259B2 (ja) 2009-09-08 2013-11-20 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5390310B2 (ja) 2009-09-08 2014-01-15 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5363252B2 (ja) 2009-09-09 2013-12-11 ルネサスエレクトロニクス株式会社 半導体集積回路
KR101208960B1 (ko) * 2010-11-26 2012-12-06 에스케이하이닉스 주식회사 반도체 장치 및 이의 테스트 방법
CN102592680B (zh) * 2011-01-12 2015-04-08 北京兆易创新科技股份有限公司 一种存储芯片的修复装置和方法
CN104681099B (zh) * 2013-11-27 2018-02-23 北京兆易创新科技股份有限公司 一种非易失性存储器的修复方法
KR102258905B1 (ko) * 2015-07-02 2021-05-31 에스케이하이닉스 주식회사 반도체 장치 및 그 동작 방법
US10366774B2 (en) * 2016-09-27 2019-07-30 Spin Memory, Inc. Device with dynamic redundancy registers
KR102713402B1 (ko) * 2016-12-13 2024-10-07 에스케이하이닉스 주식회사 반도체 장치 및 이를 포함하는 반도체 시스템
KR101969640B1 (ko) * 2017-05-25 2019-04-16 호서대학교 산학협력단 메모리를 테스트하기 위한 인터페이스 카드
CN109698008B (zh) * 2017-10-23 2021-01-15 北京兆易创新科技股份有限公司 Nor型存储器位线故障的修复方法及装置
CN108226752B (zh) * 2017-12-25 2020-07-03 北京物芯科技有限责任公司 一种芯片的故障修复方法、装置和设备
CN110456251A (zh) * 2018-05-07 2019-11-15 格科微电子（上海）有限公司 图像传感器芯片的阵列式测试方法
CN110827878B (zh) * 2018-08-08 2021-09-14 华邦电子股份有限公司 存储器装置
CN110473586B (zh) * 2019-07-31 2021-05-14 珠海博雅科技有限公司 一种写失效存储单元的替换方法、装置、设备及存储介质
CN112530500B (zh) * 2019-09-19 2024-08-09 晶豪科技股份有限公司 电子熔丝烧入电路以及电子熔丝烧入方法
CN113948145B (zh) * 2020-07-17 2024-05-14 长鑫存储技术有限公司 封装芯片的测试方法、系统、计算机设备和存储介质
CN112216621A (zh) * 2020-10-14 2021-01-12 上海华虹宏力半导体制造有限公司 存储器晶圆测试方法和测试装置
CN114460447B (zh) * 2021-01-19 2023-03-28 沐曦集成电路(上海)有限公司 锁存器的自测试电路及其自测试方法
CN117524291B (zh) * 2024-01-05 2024-03-29 长鑫存储技术(西安)有限公司 封装后修复电路、封装后修复方法和存储器装置

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0432359A3 (en) * 1989-11-21 1993-03-17 International Business Machines Corporation Method and apparatus for performing memory protection operations in a parallel processor system
US5490042A (en) * 1992-08-10 1996-02-06 Environmental Research Institute Of Michigan Programmable silicon circuit board
JPH06194650A (ja) * 1992-12-25 1994-07-15 Citizen Watch Co Ltd 表示装置
SE503316C2 (sv) * 1994-04-19 1996-05-13 Ericsson Telefon Ab L M Förfarande för övervakning av ett minne samt kretsanordning härför
US5655113A (en) * 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5528539A (en) * 1994-09-29 1996-06-18 Micron Semiconductor, Inc. High speed global row redundancy system
US5724366A (en) * 1995-05-16 1998-03-03 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
KR970001564U (ko) * 1995-06-21 1997-01-21 자동차용 후부차체의 보강구조
US5655105A (en) * 1995-06-30 1997-08-05 Micron Technology, Inc. Method and apparatus for multiple latency synchronous pipelined dynamic random access memory
US5689455A (en) * 1995-08-31 1997-11-18 Micron Technology, Inc. Circuit for programming antifuse bits
US5706292A (en) * 1996-04-25 1998-01-06 Micron Technology, Inc. Layout for a semiconductor memory device having redundant elements
US5883843A (en) * 1996-04-30 1999-03-16 Texas Instruments Incorporated Built-in self-test arrangement for integrated circuit memory devices
JP3673027B2 (ja) * 1996-09-05 2005-07-20 沖電気工業株式会社 テスト対象の半導体記憶回路を備えた半導体記憶装置
US5724282A (en) * 1996-09-06 1998-03-03 Micron Technology, Inc. System and method for an antifuse bank
US6023431A (en) * 1996-10-03 2000-02-08 Micron Technology, Inc. Low current redundancy anti-fuse method and apparatus
US5946245A (en) * 1996-11-27 1999-08-31 Texas Instruments Incorporated Memory array test circuit and method
US6119251A (en) * 1997-04-22 2000-09-12 Micron Technology, Inc. Self-test of a memory device
US6032264A (en) * 1997-04-22 2000-02-29 Micron Technology, Inc. Apparatus and method implementing repairs on a memory device
US5910921A (en) * 1997-04-22 1999-06-08 Micron Technology, Inc. Self-test of a memory device
JPH10302497A (ja) * 1997-04-28 1998-11-13 Fujitsu Ltd 不良アドレスの代替方法、半導体記憶装置、及び、半導体装置
TW374951B (en) * 1997-04-30 1999-11-21 Toshiba Corp Semiconductor memory
US6154851A (en) * 1997-08-05 2000-11-28 Micron Technology, Inc. Memory repair
US5959929A (en) * 1997-12-29 1999-09-28 Micron Technology, Inc. Method for writing to multiple banks of a memory device
CN1223443A (zh) * 1998-01-16 1999-07-21 三菱电机株式会社 半导体集成电路装置
US6114878A (en) * 1998-02-13 2000-09-05 Micron Technology, Inc. Circuit for contact pad isolation
DE19838861A1 (de) * 1998-08-26 2000-03-02 Siemens Ag Verfahren zur Reparatur von defekten Speicherzellen eines integrierten Speichers
US6550023B1 (en) * 1998-10-19 2003-04-15 Hewlett Packard Development Company, L.P. On-the-fly memory testing and automatic generation of bitmaps
US6249893B1 (en) * 1998-10-30 2001-06-19 Advantest Corp. Method and structure for testing embedded cores based system-on-a-chip
US6144593A (en) * 1999-09-01 2000-11-07 Micron Technology, Inc. Circuit and method for a multiplexed redundancy scheme in a memory device
DE19963689A1 (de) * 1999-12-29 2001-07-12 Infineon Technologies Ag Schaltungsanordnung eines integrierten Halbleiterspeichers zum Speichern von Adressen fehlerhafter Speicherzellen
US6259639B1 (en) * 2000-02-16 2001-07-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device capable of repairing defective parts in a large-scale memory
JP2002014875A (ja) * 2000-06-30 2002-01-18 Mitsubishi Electric Corp 半導体集積回路、半導体集積回路のメモリリペア方法およびその方法をコンピュータに実行させるプログラムを記録したコンピュータ読み取り可能な記録媒体
US6417695B1 (en) * 2001-03-15 2002-07-09 Micron Technology, Inc. Antifuse reroute of dies

Also Published As

Publication number Publication date
DE60232227D1 (de) 2009-06-18
JP2004528669A (ja) 2004-09-16
KR100559022B1 (ko) 2006-03-10
WO2002089147A2 (en) 2002-11-07
US20020133767A1 (en) 2002-09-19
EP1368812A2 (de) 2003-12-10
CN100483557C (zh) 2009-04-29
CN1509479A (zh) 2004-06-30
WO2002089147A3 (en) 2003-05-01
US20020133770A1 (en) 2002-09-19
KR20040041540A (ko) 2004-05-17
US6918072B2 (en) 2005-07-12
AU2002338564A1 (en) 2002-11-11
JP4027805B2 (ja) 2007-12-26
US6904552B2 (en) 2005-06-07
EP1368812B1 (de) 2009-05-06

Similar Documents

Publication Publication Date Title
ATE430980T1 (de) Schaltung und verfahren zur prüfung und reparatur
WO2004073041A3 (en) Testing embedded memories in an integrated circuit
WO2004003967A3 (en) Scan test method providing real time identification of failing test patterns and test controller for use therewith
DE60104854D1 (de) System und verfahren zur prüfung von integrierten schaltungen
GB2296583B (en) Defective cell repairing circuits and methods
DE60100075D1 (de) Prüfverfahren auf Kurzschlüsse in Akkumulatoren, und Herstellverfahren für Akkumulatoren
ATE364227T1 (de) Verfahren und system zur optimierung der testkosten und deaktivierungsdefekte für scan- und bist-speicher
ATE416682T1 (de) Gerät zur reparatur von gelenkknorpeldefekten
ATE462980T1 (de) Ic-testverfahren und vorrichtung
WO2005111796A3 (en) Defect location identification for microdevice manufacturing and test
DE60326854D1 (de) System und verfahren zur selbstpr fung und reparatur von speichermodulen
KR930024021A (ko) 반도체 메모리 장치의 컬럼 리던던시
DE60200992D1 (de) "Timing"-Kalibrierung und -Verifikation von Testern für elektronische Schaltungen
TW352466B (en) Apparatus and method for testing integrated circuit
EP1293988A3 (de) Speicherzelle
DE59803371D1 (de) Verfahren zur prüfung der busanschlüsse von beschreib- und lesbaren integrierten, elektronischen schaltkreisen, insbesondere von speicherbausteinen
DE602006006065D1 (de) Prüfen einer integrierten schaltung, die geheiminformationen enthält
EP1367599A3 (de) Redundanz -Schaltung und -Verfahren für Halbleiterspeicher
TW200629284A (en) Semiconductor memory device and method of testing the same
DE60233925D1 (de) Schaltung und Verfahren zur Verbesserung des Nutzungsgrades in einem Rasterpufferspeicher unter Verwendung von fehlerhaften Speicherstellen
FR2790832B1 (fr) Procede de test de circuits integres avec acces a des points de memorisation du circuit
MY116817A (en) Apparatus and method for programmable parametric toggle testing of digital cmos pads
DE60212103D1 (de) Strukturierter speicherzellentest
ATE464571T1 (de) Verfahren und testvorrichtung zur prüfung integrierter schaltungen
KR970012777A (ko) 플래쉬 메모리셀의 리페어 회로 및 리페어 방법

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties