ATE447276T1 - Skalierbare verbindungen von einrichtung zu einrichtung - Google Patents

Skalierbare verbindungen von einrichtung zu einrichtung

Info

Publication number
ATE447276T1
ATE447276T1 AT04781551T AT04781551T ATE447276T1 AT E447276 T1 ATE447276 T1 AT E447276T1 AT 04781551 T AT04781551 T AT 04781551T AT 04781551 T AT04781551 T AT 04781551T AT E447276 T1 ATE447276 T1 AT E447276T1
Authority
AT
Austria
Prior art keywords
facility
data
scalable
connections
lane
Prior art date
Application number
AT04781551T
Other languages
English (en)
Inventor
Bradley Booth
Quang Le
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE447276T1 publication Critical patent/ATE447276T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/4013—Management of data rate on the bus
    • H04L12/40136—Nodes adapting their rate to the physical link properties
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Information Transfer Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)
  • Paper (AREA)
  • Electrotherapy Devices (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
AT04781551T 2003-08-20 2004-08-18 Skalierbare verbindungen von einrichtung zu einrichtung ATE447276T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/645,045 US7516237B2 (en) 2003-08-20 2003-08-20 Scalable device-to-device interconnection
PCT/US2004/026891 WO2005020513A1 (en) 2003-08-20 2004-08-18 Scalable device-to-device interconnection

Publications (1)

Publication Number Publication Date
ATE447276T1 true ATE447276T1 (de) 2009-11-15

Family

ID=34194224

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04781551T ATE447276T1 (de) 2003-08-20 2004-08-18 Skalierbare verbindungen von einrichtung zu einrichtung

Country Status (7)

Country Link
US (1) US7516237B2 (de)
EP (1) EP1668832B1 (de)
CN (1) CN1871817B (de)
AT (1) ATE447276T1 (de)
DE (1) DE602004023867D1 (de)
TW (1) TWI272797B (de)
WO (1) WO2005020513A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050210310A1 (en) * 2002-08-30 2005-09-22 Fujitsu Siemens Computers Gmbh Method and apparatus for operating peripheral units on a bus
US8401043B1 (en) * 2008-11-18 2013-03-19 Marvell Israel (M.L.S.L) Ltd. Hardware interface utilizing alignment symbols for demultiplexing
EP2362233B1 (de) * 2010-02-02 2014-05-14 STMicroelectronics Srl Integrierte Vorrichtung zur elektrischen Verbindung mit Fehlererkennungsmodul und elektronisches Gerät, das die Vorrichtung umfasst
US8972614B2 (en) * 2011-12-26 2015-03-03 Apple Inc. Half-duplex SATA link with controlled idle gap insertion
US9537644B2 (en) 2012-02-23 2017-01-03 Lattice Semiconductor Corporation Transmitting multiple differential signals over a reduced number of physical channels
JP2014138389A (ja) * 2013-01-18 2014-07-28 Canon Inc 送信装置、受信装置、情報処理システム、制御方法及び通信方法
US9230505B2 (en) * 2013-02-25 2016-01-05 Lattice Semiconductor Corporation Apparatus, system and method for providing clock and data signaling
US9871516B2 (en) 2014-06-04 2018-01-16 Lattice Semiconductor Corporation Transmitting apparatus with source termination
US11190335B2 (en) * 2018-01-23 2021-11-30 Intel Corporation Method and apparatus for performing non-unique data pattern detection and alignment in a receiver implemented on a field programmable gate array
JP7158632B2 (ja) * 2020-07-22 2022-10-21 三菱電機株式会社 スレーブ装置、中継装置、マスタスレーブシステム、スレーブ制御方法、スレーブ制御プログラム、中継方法、及び、中継プログラム

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6169729B1 (en) 1997-04-08 2001-01-02 Level One Communications, Inc. 200 Mbps PHY/MAC apparatus and method
US6094439A (en) 1997-08-15 2000-07-25 Advanced Micro Devices, Inc. Arrangement for transmitting high speed packet data from a media access controller across multiple physical links
US6760307B2 (en) 1997-08-29 2004-07-06 Intel Corporation Method and apparatus for controlling the flow of data between servers using optimistic transmitter
US6604206B2 (en) 2001-05-30 2003-08-05 Cicada Semiconductor Corporation Reduced GMII with internal timing compensation
US7433971B2 (en) 2001-11-16 2008-10-07 Intel Corporation Interface and related methods for dynamic channelization in an ethernet architecture
US20030235203A1 (en) * 2002-06-25 2003-12-25 Alderrou Donald W. Extender sublayer device
US7324537B2 (en) * 2003-07-18 2008-01-29 Intel Corporation Switching device with asymmetric port speeds

Also Published As

Publication number Publication date
WO2005020513A1 (en) 2005-03-03
TW200531475A (en) 2005-09-16
CN1871817A (zh) 2006-11-29
EP1668832B1 (de) 2009-10-28
US20050044257A1 (en) 2005-02-24
CN1871817B (zh) 2010-10-13
US7516237B2 (en) 2009-04-07
EP1668832A1 (de) 2006-06-14
TWI272797B (en) 2007-02-01
DE602004023867D1 (de) 2009-12-10

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties