ATE449483T1 - Synchronisationsschema mit adaptiver referenzfrequenzkorrektur - Google Patents

Synchronisationsschema mit adaptiver referenzfrequenzkorrektur

Info

Publication number
ATE449483T1
ATE449483T1 AT06765866T AT06765866T ATE449483T1 AT E449483 T1 ATE449483 T1 AT E449483T1 AT 06765866 T AT06765866 T AT 06765866T AT 06765866 T AT06765866 T AT 06765866T AT E449483 T1 ATE449483 T1 AT E449483T1
Authority
AT
Austria
Prior art keywords
reference frequency
frequency
synchronization
signal generator
conversion unit
Prior art date
Application number
AT06765866T
Other languages
English (en)
Inventor
Markus Neumann
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE449483T1 publication Critical patent/ATE449483T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
    • H03J1/0041—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers
    • H03J1/005—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers in a loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J7/00—Automatic frequency control; Automatic scanning over a band of frequencies
    • H03J7/02—Automatic frequency control
    • H03J7/04—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
    • H03J7/06—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant using counters or frequency dividers
    • H03J7/065—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant using counters or frequency dividers the counter or frequency divider being used in a phase locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Superheterodyne Receivers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
AT06765866T 2005-06-29 2006-06-26 Synchronisationsschema mit adaptiver referenzfrequenzkorrektur ATE449483T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05105781 2005-06-29
PCT/IB2006/052085 WO2007000712A1 (en) 2005-06-29 2006-06-26 Synchronization scheme with adaptive reference frequency correction

Publications (1)

Publication Number Publication Date
ATE449483T1 true ATE449483T1 (de) 2009-12-15

Family

ID=37075160

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06765866T ATE449483T1 (de) 2005-06-29 2006-06-26 Synchronisationsschema mit adaptiver referenzfrequenzkorrektur

Country Status (7)

Country Link
US (2) US8004322B2 (de)
EP (1) EP1900138B1 (de)
JP (1) JP4826968B2 (de)
CN (1) CN101213783B (de)
AT (1) ATE449483T1 (de)
DE (1) DE602006010553D1 (de)
WO (1) WO2007000712A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602006010553D1 (de) * 2005-06-29 2009-12-31 Nxp Bv Synchronisationsschema mit adaptiver referenzfrequenzkorrektur
US8406702B2 (en) 2008-03-26 2013-03-26 Freescale Semiconductor, Inc. Clock signal generating arrangement for a communication device
JP4894822B2 (ja) * 2008-07-04 2012-03-14 株式会社豊田自動織機 周波数補正システム及び受信機
US7994829B2 (en) * 2009-10-16 2011-08-09 Realtek Semiconductor Corp. Fast lock-in all-digital phase-locked loop with extended tracking range
US8217689B2 (en) * 2010-01-19 2012-07-10 Integrated Device Technology, Inc. Method and circuit for DisplayPort video clock recovery
US8330644B2 (en) * 2010-07-14 2012-12-11 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Expandable and reconfigurable instrument node arrays
US8279014B2 (en) * 2011-01-07 2012-10-02 Uniband Electronic Corp. Frequency synthesizer with built-in carrier and crystal oscillation frequency offset cancellation
AU2012295802B2 (en) * 2011-08-12 2017-03-30 Nissan Chemical Industries, Ltd. Tricyclic heterocyclic compounds and JAK inhibitors
US8791762B2 (en) 2011-10-13 2014-07-29 Sand 9, Inc. Method and apparatus for managing arbitrary frequencies
CA2955510C (en) * 2014-07-25 2018-09-04 Allen-Vanguard Corporation System and method for ultra wideband radio frequency scanning and signal generation
CN105375921A (zh) * 2014-08-27 2016-03-02 硅谷实验室公司 使用基于mems的振荡器的准确频率控制
US10826565B2 (en) 2014-09-05 2020-11-03 Momentum Dynamics Corporation Near field, full duplex data link for resonant induction wireless charging
US11121740B2 (en) 2014-09-05 2021-09-14 Momentum Dynamics Corporation Near field, full duplex data link for resonant induction wireless charging
CN107112123B (zh) * 2014-09-05 2018-08-07 动量动力学公司 用于静态和动态谐振感应无线充电的近场全双工数据链路
CN104601317B (zh) * 2014-12-31 2017-12-26 南京大全自动化科技有限公司 一种fpga的同步时钟装置及其控制方法
US9954542B1 (en) 2017-02-01 2018-04-24 Apple Inc. Digital linearization technique for charge pump based fractional phased-locked loop

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2054734C1 (de) * 1970-11-06 1980-10-23 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Synchronisation eines Übertragungssystems
FR2561468B1 (fr) 1984-03-13 1989-10-20 Thomson Csf Filtre actif hyperfrequence
JPS6335017A (ja) 1986-07-30 1988-02-15 Japan Radio Co Ltd 無線周波数安定化装置
JPS6410748A (en) * 1987-07-02 1989-01-13 Fujitsu Ltd Frequency error forcive correction circuit
JPH06197140A (ja) * 1992-10-28 1994-07-15 Hitachi Ltd ディジタル復調回路
SG72618A1 (en) * 1993-04-20 2000-05-23 Rca Thomson Licensing A phase lock loop with error measurement and correction in alternate periods
US5497126A (en) * 1993-11-09 1996-03-05 Motorola, Inc. Phase synchronization circuit and method therefor for a phase locked loop
US5604468A (en) * 1996-04-22 1997-02-18 Motorola, Inc. Frequency synthesizer with temperature compensation and frequency multiplication and method of providing the same
JP3875347B2 (ja) 1997-04-08 2007-01-31 富士通株式会社 無線受信機および無線送受信機
US6178216B1 (en) * 1997-05-21 2001-01-23 Samsung Electronics Co., Ltd. Digital phase locked loop circuit and method therefor
US5856766A (en) * 1997-06-30 1999-01-05 Motorola Inc. Communication device with a frequency compensating synthesizer and method of providing same
US7221921B2 (en) * 1998-05-29 2007-05-22 Silicon Laboratories Partitioning of radio-frequency apparatus
JP3439670B2 (ja) * 1998-10-15 2003-08-25 富士通株式会社 階層型ｄｌｌ回路を利用したタイミングクロック発生回路
US6181195B1 (en) * 1998-12-23 2001-01-30 Xerox Corporation Impedance transport circuit
US6463266B1 (en) * 1999-08-10 2002-10-08 Broadcom Corporation Radio frequency control for communications systems
US6259328B1 (en) * 1999-12-17 2001-07-10 Network Equipment Technologies, Inc. Method and system for managing reference signals for network clock synchronization
DE60035187T2 (de) * 2000-06-28 2008-02-14 Stmicroelectronics N.V. Verfahren zur Reduzierung des Elektrizitätsverbrauchs eines zellularen Mobiltelefons
JP2003069426A (ja) * 2001-08-23 2003-03-07 Matsushita Electric Ind Co Ltd 周波数シンセサイザー
JP4608153B2 (ja) * 2001-09-10 2011-01-05 ルネサスエレクトロニクス株式会社 チャージポンプ電流補正回路
US6856791B2 (en) 2002-03-14 2005-02-15 Ericsson Inc. Direct automatic frequency control method and apparatus
US6989698B2 (en) * 2002-08-26 2006-01-24 Integrant Technologies Inc. Charge pump circuit for compensating mismatch of output currents
CA2442876C (en) * 2002-09-30 2007-01-09 Vcom Inc. Timesliced discrete-time phase locked loop
US7768360B2 (en) * 2002-10-15 2010-08-03 Marvell World Trade Ltd. Crystal oscillator emulator
US7760039B2 (en) * 2002-10-15 2010-07-20 Marvell World Trade Ltd. Crystal oscillator emulator
US7253495B2 (en) * 2002-10-15 2007-08-07 Marvell World Trade Ltd. Integrated circuit package with air gap
US6744292B2 (en) * 2002-10-25 2004-06-01 Exar Corporation Loop filter capacitor multiplication in a charge pump circuit
US7064617B2 (en) * 2003-05-02 2006-06-20 Silicon Laboratories Inc. Method and apparatus for temperature compensation
JP2005079981A (ja) 2003-09-01 2005-03-24 Sony Corp 受信機
US7176738B1 (en) * 2003-11-20 2007-02-13 Integrated Device Technology, Inc. Method and apparatus for clock generation
KR100968296B1 (ko) * 2003-12-11 2010-07-07 모사이드 테크놀로지스, 인코포레이티드 Ｐｌｌ／ｄｌｌ의 고출력 임피던스 충전 펌프
US7161401B2 (en) * 2004-02-27 2007-01-09 Broadcom Corporation Wide output-range charge pump with active biasing current
US7130225B1 (en) * 2004-03-03 2006-10-31 Atheros Communications, Inc. Charge pump with large bypass capacitors
US7102400B1 (en) * 2004-08-30 2006-09-05 Sitel Semiconductor B.V. Phase locked loop charge pump and method of operation
US7141936B2 (en) * 2004-11-10 2006-11-28 Xerox Corporation Driving circuit for light emitting diode
DE602006010553D1 (de) * 2005-06-29 2009-12-31 Nxp Bv Synchronisationsschema mit adaptiver referenzfrequenzkorrektur
US7483678B2 (en) * 2005-09-27 2009-01-27 Skyworks Solutions, Inc. Single chip GSM/EDGE transceiver architecture with closed loop power control
US8014476B2 (en) * 2005-11-07 2011-09-06 Qualcomm, Incorporated Wireless device with a non-compensated crystal oscillator
US7626462B1 (en) * 2006-05-02 2009-12-01 Rf Micro Devices, Inc. Fractional-N based digital AFC system with a translational PLL transmitter
US7671648B2 (en) * 2006-10-27 2010-03-02 Micron Technology, Inc. System and method for an accuracy-enhanced DLL during a measure initialization mode
US7977984B1 (en) * 2007-10-13 2011-07-12 Altera Corporation High-speed charge pump circuits
US8018269B2 (en) * 2007-11-13 2011-09-13 Qualcomm Incorporated Fast-switching low-noise charge pump
KR100956770B1 (ko) * 2007-12-10 2010-05-12 주식회사 하이닉스반도체 Ｄｌｌ 회로 및 그 제어 방법
US7847602B2 (en) * 2008-12-05 2010-12-07 Taitien Electronics Co., Ltd. Digitally controlled frequency generator
US8198927B2 (en) * 2010-02-01 2012-06-12 Analog Devices, Inc. High speed charge pump

Also Published As

Publication number Publication date
WO2007000712A1 (en) 2007-01-04
JP4826968B2 (ja) 2011-11-30
EP1900138B1 (de) 2009-11-18
US20110248754A1 (en) 2011-10-13
US20100156481A1 (en) 2010-06-24
EP1900138A1 (de) 2008-03-19
CN101213783B (zh) 2011-08-31
US8400195B2 (en) 2013-03-19
US8004322B2 (en) 2011-08-23
DE602006010553D1 (de) 2009-12-31
CN101213783A (zh) 2008-07-02
JP2008547345A (ja) 2008-12-25

Similar Documents

Publication Publication Date Title
ATE449483T1 (de) Synchronisationsschema mit adaptiver referenzfrequenzkorrektur
EP1874549A4 (de) Pixelfrequenzgenerator, pulsmodulator und bilderzeugungsvorrichtung
AR041468A1 (es) Un metodo optimo interpolador y un aparato para ajuste digital de tiempo
TR200102834T2 (tr) Gürültü-ileri-besleme yönetimiyle osilatör gürültüsünün azaltılması için yöntem ve cihaz.
RU2010117398A (ru) Устройства и способы подстройки частоты в синтезаторе частот с множеством выходов
JP2010062767A5 (de)
IN2014CN00291A (de)
WO2010033436A3 (en) Techniques for generating fractional clock signals
TW200515710A (en) Delay locked loop and its control method
GB2491507A (en) Digital frequency locked loop
MX2009007648A (es) Metodos y aparato para escalacion de frecuencia dinamica de bucles de fase bloqueada para microprocesadores.
GB2431061A (en) Synchronous follow-up apparatus and synchronous follow-up method
TW200721767A (en) Transmitting/receiving device and communication system using the same
NZ616648A (en) Navigation signal transmitter and method for generating navigation signal
TW200746646A (en) Phase locked loop frequency synthesizer and method for modulating the same and apparatus for modlating phase locked loop
TW200635235A (en) Frequency calibration for a monolithic clock generator and timing/frequency reference
TW200609899A (en) Image signal processing apparatus and phase synchronization method
TW200723696A (en) Delay locked loop circuit and method
EP1738476A4 (de) System zum synchronisieren eines tragbaren sender/empfängers mit einem netzwerk
TW200630852A (en) Image output and input systems
TW200505166A (en) Phase locked loop system capable of deskewing and method therefor
TW200507460A (en) Delay-locked loop (DLL) capable of directly receiving external clock signals
ATE429736T1 (de) Zeitsystem und verfahren für ein drahtloses sendeempfangssystem
ATE328393T1 (de) Pll-schaltung
JP2016005380A (ja) 電力変換装置の多重化システム

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties