ATE450043T1 - Verfahren zur programmierung eines nicht flüchtigen speichers mit verminderter programmstörung über modizifierte durchgangsspannungen - Google Patents

Verfahren zur programmierung eines nicht flüchtigen speichers mit verminderter programmstörung über modizifierte durchgangsspannungen

Info

Publication number
ATE450043T1
ATE450043T1 AT06847622T AT06847622T ATE450043T1 AT E450043 T1 ATE450043 T1 AT E450043T1 AT 06847622 T AT06847622 T AT 06847622T AT 06847622 T AT06847622 T AT 06847622T AT E450043 T1 ATE450043 T1 AT E450043T1
Authority
AT
Austria
Prior art keywords
programming
word lines
volatile storage
storage elements
volatile memory
Prior art date
Application number
AT06847622T
Other languages
English (en)
Inventor
Gerrit Hemink
Ken Oowada
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/313,023 external-priority patent/US7355889B2/en
Priority claimed from US11/312,925 external-priority patent/US7355888B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE450043T1 publication Critical patent/ATE450043T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562Multilevel memory programming aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
AT06847622T 2005-12-19 2006-12-13 Verfahren zur programmierung eines nicht flüchtigen speichers mit verminderter programmstörung über modizifierte durchgangsspannungen ATE450043T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/313,023 US7355889B2 (en) 2005-12-19 2005-12-19 Method for programming non-volatile memory with reduced program disturb using modified pass voltages
US11/312,925 US7355888B2 (en) 2005-12-19 2005-12-19 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages
PCT/US2006/047611 WO2007078793A1 (en) 2005-12-19 2006-12-13 Method for programming non-volatile memory with reduced program disturb using modified pass voltages

Publications (1)

Publication Number Publication Date
ATE450043T1 true ATE450043T1 (de) 2009-12-15

Family

ID=38019131

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06847622T ATE450043T1 (de) 2005-12-19 2006-12-13 Verfahren zur programmierung eines nicht flüchtigen speichers mit verminderter programmstörung über modizifierte durchgangsspannungen

Country Status (7)

Country Link
EP (1) EP1964127B1 (de)
JP (1) JP4808784B2 (de)
KR (1) KR100966357B1 (de)
AT (1) ATE450043T1 (de)
DE (1) DE602006010742D1 (de)
TW (1) TWI326487B (de)
WO (1) WO2007078793A1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7466590B2 (en) 2004-02-06 2008-12-16 Sandisk Corporation Self-boosting method for flash memory cells
US7161833B2 (en) 2004-02-06 2007-01-09 Sandisk Corporation Self-boosting system for flash memory cells
US7436733B2 (en) 2006-03-03 2008-10-14 Sandisk Corporation System for performing read operation on non-volatile storage with compensation for coupling
US7499319B2 (en) 2006-03-03 2009-03-03 Sandisk Corporation Read operation for non-volatile storage with compensation for coupling
US7511995B2 (en) 2006-03-30 2009-03-31 Sandisk Corporation Self-boosting system with suppression of high lateral electric fields
US7428165B2 (en) 2006-03-30 2008-09-23 Sandisk Corporation Self-boosting method with suppression of high lateral electric fields
US7310272B1 (en) 2006-06-02 2007-12-18 Sandisk Corporation System for performing data pattern sensitivity compensation using different voltage
US7450421B2 (en) 2006-06-02 2008-11-11 Sandisk Corporation Data pattern sensitivity compensation using different voltage
WO2008039667A2 (en) * 2006-09-27 2008-04-03 Sandisk Corporation Reducing program disturb in non-volatile storage
US8184478B2 (en) 2006-09-27 2012-05-22 Sandisk Technologies Inc. Apparatus with reduced program disturb in non-volatile storage
US8189378B2 (en) 2006-09-27 2012-05-29 Sandisk Technologies Inc. Reducing program disturb in non-volatile storage
US7440324B2 (en) 2006-12-29 2008-10-21 Sandisk Corporation Apparatus with alternating read mode
US7495962B2 (en) 2006-12-29 2009-02-24 Sandisk Corporation Alternating read mode
US7606070B2 (en) 2006-12-29 2009-10-20 Sandisk Corporation Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation
US7518923B2 (en) 2006-12-29 2009-04-14 Sandisk Corporation Margined neighbor reading for non-volatile memory read operations including coupling compensation
KR100953046B1 (ko) * 2007-12-27 2010-04-14 주식회사 하이닉스반도체 불휘발성 메모리 소자의 동작 방법
KR101407361B1 (ko) * 2008-04-14 2014-06-13 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 프로그램 방법
US7916533B2 (en) 2009-06-24 2011-03-29 Sandisk Corporation Forecasting program disturb in memory by detecting natural threshold voltage distribution
US8134871B2 (en) 2009-08-05 2012-03-13 Sandisk Technologies Inc. Programming memory with reduced pass voltage disturb and floating gate-to-control gate leakage
KR101561270B1 (ko) 2009-10-15 2015-10-19 삼성전자주식회사 플래시 메모리 장치 그리고 그것의 채널 프리챠지 및 프로그램 방법들
JP5238741B2 (ja) 2010-03-19 2013-07-17 株式会社東芝 不揮発性半導体記憶装置
KR102062314B1 (ko) * 2013-03-15 2020-01-03 삼성전자주식회사 불휘발성 메모리 장치 및 프로그램 방법
KR102771470B1 (ko) * 2019-11-05 2025-02-25 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
US12073886B2 (en) 2021-03-10 2024-08-27 Sunrise Memory Corporation Semiconductor memory device with write disturb reduction
US20240412788A1 (en) * 2021-10-20 2024-12-12 Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University) 3d flash memory and operation method thereof
KR20240071732A (ko) 2022-11-16 2024-05-23 에스케이하이닉스 주식회사 포기-파인 프로그램 동작을 수행하는 메모리 장치 및 그 동작 방법
KR20240122194A (ko) 2023-02-03 2024-08-12 에스케이하이닉스 주식회사 프로그램 동작을 수행하는 메모리 장치

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5715194A (en) * 1996-07-24 1998-02-03 Advanced Micro Devices, Inc. Bias scheme of program inhibit for random programming in a nand flash memory
KR100385230B1 (ko) * 2000-12-28 2003-05-27 삼성전자주식회사 불휘발성 반도체 메모리 장치의 프로그램 방법
JP3957985B2 (ja) * 2001-03-06 2007-08-15 株式会社東芝 不揮発性半導体記憶装置
JP3863485B2 (ja) * 2002-11-29 2006-12-27 株式会社東芝 不揮発性半導体記憶装置
US6888758B1 (en) * 2004-01-21 2005-05-03 Sandisk Corporation Programming non-volatile memory
US7161833B2 (en) * 2004-02-06 2007-01-09 Sandisk Corporation Self-boosting system for flash memory cells

Also Published As

Publication number Publication date
KR100966357B1 (ko) 2010-06-28
KR20080089426A (ko) 2008-10-06
TWI326487B (en) 2010-06-21
DE602006010742D1 (de) 2010-01-07
EP1964127B1 (de) 2009-11-25
JP4808784B2 (ja) 2011-11-02
WO2007078793A1 (en) 2007-07-12
EP1964127A1 (de) 2008-09-03
TW200739890A (en) 2007-10-16
JP2009520314A (ja) 2009-05-21

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