ATE454806T1 - Herstellungsverfahren einer karte und erhaltene karte - Google Patents

Herstellungsverfahren einer karte und erhaltene karte

Info

Publication number
ATE454806T1
ATE454806T1 AT02750400T AT02750400T ATE454806T1 AT E454806 T1 ATE454806 T1 AT E454806T1 AT 02750400 T AT02750400 T AT 02750400T AT 02750400 T AT02750400 T AT 02750400T AT E454806 T1 ATE454806 T1 AT E454806T1
Authority
AT
Austria
Prior art keywords
card
ground
production
power layer
gaps
Prior art date
Application number
AT02750400T
Other languages
English (en)
Inventor
Robert Wallace
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE454806T1 publication Critical patent/ATE454806T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0256—Electrical insulation details, e.g. around high voltage areas
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07732—Physical layout of the record carrier the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07735—Physical layout of the record carrier the record carrier comprising means for protecting against electrostatic discharge
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/241—Reinforcing of the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing of the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257—Overvoltage protection
    • H05K1/0259—Electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969—Apertured conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Credit Cards Or The Like (AREA)
  • Magnetic Record Carriers (AREA)
AT02750400T 2001-08-03 2002-08-02 Herstellungsverfahren einer karte und erhaltene karte ATE454806T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/921,664 US6597061B1 (en) 2001-08-03 2001-08-03 Card manufacturing technique and resulting card
PCT/US2002/024535 WO2003015484A1 (en) 2001-08-03 2002-08-02 Card manufacturing technique and resulting card

Publications (1)

Publication Number Publication Date
ATE454806T1 true ATE454806T1 (de) 2010-01-15

Family

ID=25445776

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02750400T ATE454806T1 (de) 2001-08-03 2002-08-02 Herstellungsverfahren einer karte und erhaltene karte

Country Status (9)

Country Link
US (4) US6597061B1 (de)
EP (1) EP1413178B1 (de)
JP (2) JP4366187B2 (de)
KR (1) KR100924238B1 (de)
CN (1) CN1290387C (de)
AT (1) ATE454806T1 (de)
DE (1) DE60235017D1 (de)
TW (1) TW551022B (de)
WO (1) WO2003015484A1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6597061B1 (en) * 2001-08-03 2003-07-22 Sandisk Corporation Card manufacturing technique and resulting card
JP3785083B2 (ja) * 2001-11-07 2006-06-14 株式会社東芝 半導体装置、電子カード及びパッド再配置基板
KR100660860B1 (ko) * 2005-02-11 2006-12-26 삼성전자주식회사 서지 전압으로 인한 집적 회로의 오동작 방지용 장치 및 방법
US7654750B2 (en) * 2005-08-10 2010-02-02 Brenner Mary K Bidirectional optical fiber link systems component couplers
DE102005041954A1 (de) * 2005-09-03 2007-03-08 Bayer Materialscience Ag Alkoxysilan- und spezielle Allophanat-und/oder Biuretgruppen aufweisende Prepolymere, ein Verfahren zu ihrer Herstellung sowie ihre Verwendung
US20070117269A1 (en) * 2005-11-19 2007-05-24 Chin-Tong Liu Method for packaging flash memory cards
US20070158799A1 (en) * 2005-12-29 2007-07-12 Chin-Tien Chiu Interconnected IC packages with vertical SMT pads
TWI301984B (en) * 2006-07-04 2008-10-11 Orient Semiconductor Elect Ltd Memory card with electrostatic discharge protection
JP2008166099A (ja) * 2006-12-28 2008-07-17 Fuji Xerox Co Ltd 回路基板および電子部品
US8928602B1 (en) 2009-03-03 2015-01-06 MCube Inc. Methods and apparatus for object tracking on a hand-held device
US8797279B2 (en) 2010-05-25 2014-08-05 MCube Inc. Analog touchscreen methods and apparatus
US8553389B1 (en) 2010-08-19 2013-10-08 MCube Inc. Anchor design and method for MEMS transducer apparatuses
US8477473B1 (en) 2010-08-19 2013-07-02 MCube Inc. Transducer structure and method for MEMS devices
US8476129B1 (en) 2010-05-24 2013-07-02 MCube Inc. Method and structure of sensors and MEMS devices using vertical mounting with interconnections
US8421082B1 (en) 2010-01-19 2013-04-16 Mcube, Inc. Integrated CMOS and MEMS with air dielectric method and system
US8710597B1 (en) 2010-04-21 2014-04-29 MCube Inc. Method and structure for adding mass with stress isolation to MEMS structures
US8936959B1 (en) 2010-02-27 2015-01-20 MCube Inc. Integrated rf MEMS, control systems and methods
US8794065B1 (en) 2010-02-27 2014-08-05 MCube Inc. Integrated inertial sensing apparatus using MEMS and quartz configured on crystallographic planes
US8367522B1 (en) * 2010-04-08 2013-02-05 MCube Inc. Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads
US8869616B1 (en) 2010-06-18 2014-10-28 MCube Inc. Method and structure of an inertial sensor using tilt conversion
TWI388248B (zh) * 2010-06-25 2013-03-01 Pegatron Corp 電子裝置
TWI525782B (zh) * 2011-01-05 2016-03-11 矽品精密工業股份有限公司 半導體封裝件及其製法
US8969101B1 (en) 2011-08-17 2015-03-03 MCube Inc. Three axis magnetic sensor device and method using flex cables
EP3259965A4 (de) 2015-02-20 2018-11-07 Nextgin Technology B.v. Verfahren zur herstellung einer druckleiterplatte
WO2018035536A2 (en) * 2016-08-19 2018-02-22 Nextgin Technology Bv Method for producing a printed circuit board
US11234325B2 (en) 2019-06-20 2022-01-25 Infinera Corporation Printed circuit board having a differential pair routing topology with negative plane routing and impedance correction structures
CN110996494B (zh) * 2019-12-19 2024-06-04 北京比特大陆科技有限公司 电路板和具有其的服务器

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2076471A5 (de) 1970-01-16 1971-10-15 Bull General Electric
EP0340492A3 (de) * 1988-05-02 1990-07-04 International Business Machines Corporation Konforme Versieglung und interplanare Verkapselung elektronischer Anordnungsstrukturen
JPH0752784B2 (ja) 1988-05-24 1995-06-05 松下電工株式会社 プリント配線板
US5182632A (en) * 1989-11-22 1993-01-26 Tactical Fabs, Inc. High density multichip package with interconnect structure and heatsink
JP2987182B2 (ja) 1990-09-04 1999-12-06 イビデン株式会社 プリント配線板
US5138115A (en) * 1990-10-12 1992-08-11 Atmel Corporation Carrierles surface mounted integrated circuit die
US5572140A (en) * 1993-08-25 1996-11-05 Sunright Limited Reusable carrier for burn-in/testing on non packaged die
US5530376A (en) * 1993-08-25 1996-06-25 Sunright Limited Reusable carrier for burn-in/testing of non packaged die
JPH09270325A (ja) * 1996-03-29 1997-10-14 Tokin Corp 電子部品
JP3012816B2 (ja) * 1996-10-22 2000-02-28 松下電子工業株式会社 樹脂封止型半導体装置およびその製造方法
JP3942684B2 (ja) 1997-02-27 2007-07-11 ユー・エム・シー・ジャパン株式会社 バーンインボード
KR100214560B1 (ko) * 1997-03-05 1999-08-02 구본준 반도체 멀티칩 모듈
KR100246587B1 (ko) * 1997-09-19 2000-03-15 유무성 볼 그리드 어레이 반도체 팩키지
US6072322A (en) * 1997-12-30 2000-06-06 Intel Corporation Thermally enhanced test socket
US6351034B1 (en) * 1998-06-01 2002-02-26 Micron Technology, Inc. Clip chip carrier
US6040622A (en) 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6283770B1 (en) * 1998-12-11 2001-09-04 Cisco Technology, Incc. Minimal intrusion EMI shielding clip to maintain electrical contact between two parallel surfaces
US6507117B1 (en) * 1999-01-29 2003-01-14 Rohm Co., Ltd. Semiconductor chip and multichip-type semiconductor device
US6597061B1 (en) * 2001-08-03 2003-07-22 Sandisk Corporation Card manufacturing technique and resulting card
TWI265611B (en) * 2003-03-11 2006-11-01 Siliconware Precision Industries Co Ltd Semiconductor package with heatsink

Also Published As

Publication number Publication date
US7022547B2 (en) 2006-04-04
KR100924238B1 (ko) 2009-10-30
JP4366187B2 (ja) 2009-11-18
JP5222238B2 (ja) 2013-06-26
US20050090038A1 (en) 2005-04-28
TW551022B (en) 2003-09-01
CN1539255A (zh) 2004-10-20
WO2003015484A1 (en) 2003-02-20
US20070111562A1 (en) 2007-05-17
EP1413178A1 (de) 2004-04-28
US20030209794A1 (en) 2003-11-13
US6597061B1 (en) 2003-07-22
DE60235017D1 (de) 2010-02-25
US7169640B2 (en) 2007-01-30
JP2004538655A (ja) 2004-12-24
EP1413178B1 (de) 2010-01-06
JP2009267434A (ja) 2009-11-12
CN1290387C (zh) 2006-12-13
KR20040032873A (ko) 2004-04-17

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