ATE456829T1 - Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports - Google Patents

Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports

Info

Publication number
ATE456829T1
ATE456829T1 AT05801343T AT05801343T ATE456829T1 AT E456829 T1 ATE456829 T1 AT E456829T1 AT 05801343 T AT05801343 T AT 05801343T AT 05801343 T AT05801343 T AT 05801343T AT E456829 T1 ATE456829 T1 AT E456829T1
Authority
AT
Austria
Prior art keywords
ports
functional units
processing circuit
data processing
write ports
Prior art date
Application number
AT05801343T
Other languages
English (en)
Inventor
Wel Antonius Van
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE456829T1 publication Critical patent/ATE456829T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30105Register structure
    • G06F9/30112Register structure comprising data of variable length
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
AT05801343T 2004-09-22 2005-09-21 Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports ATE456829T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04104582 2004-09-22
PCT/IB2005/053102 WO2006033078A2 (en) 2004-09-22 2005-09-21 Data processing circuit wherein functional units share read ports

Publications (1)

Publication Number Publication Date
ATE456829T1 true ATE456829T1 (de) 2010-02-15

Family

ID=34929596

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05801343T ATE456829T1 (de) 2004-09-22 2005-09-21 Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports

Country Status (8)

Country Link
US (1) US8108658B2 (de)
EP (1) EP1794672B1 (de)
JP (1) JP5346467B2 (de)
KR (1) KR101311187B1 (de)
CN (1) CN101027635A (de)
AT (1) ATE456829T1 (de)
DE (1) DE602005019180D1 (de)
WO (1) WO2006033078A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8713286B2 (en) * 2005-04-26 2014-04-29 Qualcomm Incorporated Register files for a digital signal processor operating in an interleaved multi-threaded environment
US9402062B2 (en) * 2007-07-18 2016-07-26 Mediatek Inc. Digital television chip, system and method thereof
GB2451845B (en) * 2007-08-14 2010-03-17 Imagination Tech Ltd Compound instructions in a multi-threaded processor
GB2488985A (en) * 2011-03-08 2012-09-19 Advanced Risc Mach Ltd Mixed size data processing operation with integrated operand conversion instructions
KR102177871B1 (ko) * 2013-12-20 2020-11-12 삼성전자주식회사 멀티 쓰레딩을 지원하기 위한 연산 유닛, 이를 포함하는 프로세서 및 프로세서의 동작 방법
JP6237241B2 (ja) * 2014-01-07 2017-11-29 富士通株式会社 処理装置
US11429555B2 (en) * 2019-02-26 2022-08-30 Apple Inc. Coprocessors with bypass optimization, variable grid architecture, and fused vector operations
JP7487535B2 (ja) * 2020-04-08 2024-05-21 富士通株式会社 演算処理装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6370623B1 (en) * 1988-12-28 2002-04-09 Philips Electronics North America Corporation Multiport register file to accommodate data of differing lengths
JPH0764789A (ja) * 1993-08-25 1995-03-10 Mitsubishi Electric Corp 並列処理プロセッサおよびそのプロセッシングユニットならびにこの並列処理プロセッサの動作方法
JP3655403B2 (ja) * 1995-10-09 2005-06-02 株式会社ルネサステクノロジ データ処理装置
US6076154A (en) 1998-01-16 2000-06-13 U.S. Philips Corporation VLIW processor has different functional units operating on commands of different widths
US6219776B1 (en) 1998-03-10 2001-04-17 Billions Of Operations Per Second Merged array controller and processing element
JP2002517856A (ja) * 1998-06-08 2002-06-18 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ メモリとデータプリフェッチユニットを備えた処理装置
KR100345173B1 (ko) * 2000-06-12 2002-07-24 주식회사 테크라프 폐전지 처리방법
ATE496533T1 (de) 2000-07-18 2011-02-15 Cornell Res Foundation Inc Medizinische verwendung von agonisten des mu- opioid rezeptors
US20040014848A1 (en) 2000-09-11 2004-01-22 Kazuya Tanaka Organic Hydrophicizing agent for aluminiferous metals
WO2002042907A2 (en) * 2000-11-27 2002-05-30 Koninklijke Philips Electronics N.V. Data processing apparatus with multi-operand instructions
JP3861054B2 (ja) * 2000-12-11 2006-12-20 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 信号処理装置および信号処理結果を複数のレジスタに供給する方法
EP1546869B1 (de) * 2002-09-24 2013-04-03 Silicon Hive B.V. Vorrichtung, verfahren und compiler zum ermöglichen der verarbeitung von ladedirektbefehlen in einem prozessor mit sehr langem befehlswort
US20040128475A1 (en) * 2002-12-31 2004-07-01 Gad Sheaffer Widely accessible processor register file and method for use

Also Published As

Publication number Publication date
US20090070559A1 (en) 2009-03-12
WO2006033078A2 (en) 2006-03-30
DE602005019180D1 (de) 2010-03-18
US8108658B2 (en) 2012-01-31
JP2008513878A (ja) 2008-05-01
WO2006033078A3 (en) 2006-05-11
JP5346467B2 (ja) 2013-11-20
CN101027635A (zh) 2007-08-29
KR20070067687A (ko) 2007-06-28
EP1794672A2 (de) 2007-06-13
KR101311187B1 (ko) 2013-09-26
EP1794672B1 (de) 2010-01-27

Similar Documents

Publication Publication Date Title
US7865693B2 (en) Aligning precision converted vector data using mask indicating offset relative to element boundary corresponding to precision type
US9652231B2 (en) All-to-all permutation of vector elements based on a permutation pattern encoded in mantissa and exponent bits in a floating-point SIMD architecture
Sima The design space of register renaming techniques
US8423983B2 (en) Generating and executing programs for a floating point single instruction multiple data instruction set architecture
US7900025B2 (en) Floating point only SIMD instruction set architecture including compare, select, Boolean, and alignment operations
US8577950B2 (en) Matrix multiplication operations with data pre-conditioning in a high performance computing architecture
CN101097512B (zh) 用于实施混洗和移位操作的方法、设备和系统
US20080126757A1 (en) Cellular engine for a data processing system
TW200710718A (en) Register file for a digital signal processor operating in an interleaved multi-threaded environment
TW200701059A (en) Data access and permute unit
CN103109261A (zh) 用于通用逻辑操作的方法和设备
SE0402710D0 (sv) Management of internal logic for electronic pens
TW200739420A (en) Unified non-partitioned register file for a digital signal processor operating in an interleaved multi-threaded environment
ATE456829T1 (de) Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports
CN103984530A (zh) 一种提高store指令执行效率的流水线结构及方法
CN101930356B (zh) 用于浮点协处理器的寄存器文件分组编址、读写控制方法
DE602004025691D1 (de) Rechnersystem mit parallelität auf befehls- und draht-ebene
ATE357017T1 (de) Mikroprozessorschaltung für tragbare datenträger
ATE436050T1 (de) Pipeline-asynchron-anweisungs-prozessorschaltun
WO2004046914A3 (en) Vliw processor with copy register file
KR20060058579A (ko) 고에너지 효율 병렬 처리 데이터 패스 구조
Biswas et al. Code size reduction in heterogeneous-connectivity-based DSPs using instruction set extensions
ATE418758T1 (de) Modulare multiplikation
WO2007057831A1 (en) Data processing method and apparatus
JP2006092158A (ja) デジタル信号処理回路

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties