ATE463011T1 - Hierarchische prozessorarchitektur zur videoverarbeitung - Google Patents

Hierarchische prozessorarchitektur zur videoverarbeitung

Info

Publication number
ATE463011T1
ATE463011T1 AT05741218T AT05741218T ATE463011T1 AT E463011 T1 ATE463011 T1 AT E463011T1 AT 05741218 T AT05741218 T AT 05741218T AT 05741218 T AT05741218 T AT 05741218T AT E463011 T1 ATE463011 T1 AT E463011T1
Authority
AT
Austria
Prior art keywords
video processing
processor architecture
data
instructions
hierarchical processor
Prior art date
Application number
AT05741218T
Other languages
English (en)
Inventor
Louis Lippincott
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE463011T1 publication Critical patent/ATE463011T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
AT05741218T 2004-05-20 2005-04-29 Hierarchische prozessorarchitektur zur videoverarbeitung ATE463011T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/850,095 US20050262311A1 (en) 2004-05-20 2004-05-20 Hierarchical processor architecture for video processing
PCT/US2005/015130 WO2005116853A1 (en) 2004-05-20 2005-04-29 Hierarchical processor architecture for video processing

Publications (1)

Publication Number Publication Date
ATE463011T1 true ATE463011T1 (de) 2010-04-15

Family

ID=34967606

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05741218T ATE463011T1 (de) 2004-05-20 2005-04-29 Hierarchische prozessorarchitektur zur videoverarbeitung

Country Status (8)

Country Link
US (1) US20050262311A1 (de)
EP (1) EP1747513B1 (de)
JP (1) JP4964774B2 (de)
CN (1) CN100555322C (de)
AT (1) ATE463011T1 (de)
DE (1) DE602005020271D1 (de)
TW (1) TWI308727B (de)
WO (1) WO2005116853A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7965898B2 (en) * 2005-10-28 2011-06-21 Nvidia Corporation Accelerating video decoding using multiple processors
JP2010282429A (ja) * 2009-06-04 2010-12-16 Canon Inc 画像処理装置及びその制御方法
US9013750B2 (en) * 2009-06-25 2015-04-21 Canon Kabushiki Kaisha Image processing for processing image data in correspondence with each pixel of an image
US8976411B2 (en) 2009-07-01 2015-03-10 Canon Kabushiki Kaisha Image processing in correspondence with each pixel of an image
US9635218B2 (en) 2009-07-03 2017-04-25 Canon Kabushiki Kaisha Image processing based on a pixel value in image data
US9880848B2 (en) * 2010-06-11 2018-01-30 Advanced Micro Devices, Inc. Processor support for hardware transactional memory
JP5671635B2 (ja) * 2014-01-07 2015-02-18 キヤノン株式会社 画像処理装置及びその制御方法
CN104023202B (zh) * 2014-03-18 2018-04-27 山东大学 高清视频处理系统
JP6575350B2 (ja) * 2015-12-24 2019-09-18 ブラザー工業株式会社 レーザ加工装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4243987A (en) * 1978-06-27 1981-01-06 Xerox Corporation Display processor for producing video signals from digitally encoded data to create an alphanumeric display
US5016876A (en) * 1988-10-14 1991-05-21 Williams Electronics Games, Inc. Video display co-processor for use in a video game
US4965793A (en) * 1989-02-03 1990-10-23 Digital Equipment Corporation Method and apparatus for interfacing a system control unit for a multi-processor
US5522083A (en) * 1989-11-17 1996-05-28 Texas Instruments Incorporated Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors
JPH07105158A (ja) * 1993-10-05 1995-04-21 Matsushita Electric Ind Co Ltd プログラムローダ
JPH07221996A (ja) * 1994-02-01 1995-08-18 Canon Inc 画像処理方法およびその装置
JPH0844678A (ja) * 1994-07-29 1996-02-16 Canon Inc 画像処理装置及びシステム
KR100213048B1 (ko) * 1995-09-29 1999-08-02 윤종용 아날로그와 디지탈 비디오 모드를 갖는 수신기와 그 수신방법
US6237029B1 (en) * 1996-02-26 2001-05-22 Argosystems, Inc. Method and apparatus for adaptable digital protocol processing
JPH1028245A (ja) * 1996-05-07 1998-01-27 Matsushita Electric Ind Co Ltd 映像信号処理装置
TW376642B (en) * 1996-05-07 1999-12-11 Matsushita Electric Industrial Co Ltd Video signal processing apparatus
JPH1091594A (ja) * 1996-09-13 1998-04-10 Hitachi Ltd マルチプロセッサデータ処理装置およびその方法
FI107842B (fi) * 1997-09-23 2001-10-15 Nokia Networks Oy Adaptiivinen prosessorijärjestelmä
JP2001312480A (ja) * 2000-05-01 2001-11-09 Nec Corp マルチプロセッサシステム
JP4640880B2 (ja) * 2000-07-14 2011-03-02 国立大学法人東京工業大学 マイクロプロセッサシステム
US7636125B2 (en) * 2002-10-22 2009-12-22 Broadcom Corporation Filter module for a video decoding system
US7499495B2 (en) * 2003-07-18 2009-03-03 Microsoft Corporation Extended range motion vectors

Also Published As

Publication number Publication date
EP1747513A1 (de) 2007-01-31
EP1747513B1 (de) 2010-03-31
CN1716312A (zh) 2006-01-04
TWI308727B (en) 2009-04-11
US20050262311A1 (en) 2005-11-24
CN100555322C (zh) 2009-10-28
JP4964774B2 (ja) 2012-07-04
TW200620152A (en) 2006-06-16
WO2005116853A1 (en) 2005-12-08
DE602005020271D1 (de) 2010-05-12
JP2007538334A (ja) 2007-12-27

Similar Documents

Publication Publication Date Title
WO2005081105A3 (en) Methods and apparatus for task management in a multi-processor system
EP2040159A3 (de) Prozessor und Schnittstelle
TW200627153A (en) Bootable post crash analysis environment
TW200741462A (en) Non-volatile memory sharing system for multiple processors and memory sharing method thereof
WO2006095184A3 (en) Data processing system
TW200739533A (en) Information playback system using information storage medium
WO2007148319A3 (en) Time information management system
WO2005103887A3 (en) Methods and apparatus for address map optimization on a multi-scalar extension
WO2003063018A3 (en) Functional pipelines
TW200634622A (en) Register file regions for a processing system
WO2008155844A1 (ja) 情報処理装置およびキャッシュ制御方法
EP3644179A3 (de) Vorrichtung und verfahren zur kachelraffung und kachelstreuung
WO2006078002A3 (en) Method and apparatus for providing synchronization of shared data
WO2005081104A8 (en) Methods and apparatus for processor task migration in a multi-processor system
WO2006015364A3 (en) System and method for data collection and processing
GB2437684B (en) Data processor adapted for efficient digital signal processing and method therefor
TW200705452A (en) System and method for recovering from errors in a data processing system
EP2015178A3 (de) Informationsverarbeitungseinheit zur automatischen Kopie von Systeminformation
TW200739383A (en) System for preventing unauthorized acquisition of information, and method thereof
ATE463011T1 (de) Hierarchische prozessorarchitektur zur videoverarbeitung
DE602008001075D1 (de) System und Verfahren zur Verarbeitung von Informationen über den Präsenzzustand mit verbesserter Zuverlässigkeit
WO2004072848A8 (en) Method and apparatus for hazard detection and management in a pipelined digital processor
WO2006094196A3 (en) Method and apparatus for power reduction in an heterogeneously- multi-pipelined processor
TW200731074A (en) Hardware-assisted device configuration detection
ATE403903T1 (de) Kontext-scheduling

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties