ATE465516T1 - Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren - Google Patents

Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren

Info

Publication number
ATE465516T1
ATE465516T1 AT04766739T AT04766739T ATE465516T1 AT E465516 T1 ATE465516 T1 AT E465516T1 AT 04766739 T AT04766739 T AT 04766739T AT 04766739 T AT04766739 T AT 04766739T AT E465516 T1 ATE465516 T1 AT E465516T1
Authority
AT
Austria
Prior art keywords
field effect
effect transistors
cmos field
producing cmos
silicidation
Prior art date
Application number
AT04766739T
Other languages
English (en)
Inventor
Cyril Cabral
Meikei Ieong
Jakub Kedzierski
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE465516T1 publication Critical patent/ATE465516T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H10D64/0132—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
AT04766739T 2003-09-24 2004-09-08 Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren ATE465516T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/669,898 US7183182B2 (en) 2003-09-24 2003-09-24 Method and apparatus for fabricating CMOS field effect transistors
PCT/EP2004/052086 WO2005029579A1 (en) 2003-09-24 2004-09-08 Method and apparatus for fabricating cmos field effect transistors

Publications (1)

Publication Number Publication Date
ATE465516T1 true ATE465516T1 (de) 2010-05-15

Family

ID=34313783

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04766739T ATE465516T1 (de) 2003-09-24 2004-09-08 Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren

Country Status (9)

Country Link
US (2) US7183182B2 (de)
EP (1) EP1668695B1 (de)
JP (1) JP2007534148A (de)
KR (1) KR100818898B1 (de)
CN (1) CN100419999C (de)
AT (1) ATE465516T1 (de)
DE (1) DE602004026753D1 (de)
TW (1) TWI334632B (de)
WO (1) WO2005029579A1 (de)

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US7348265B2 (en) * 2004-03-01 2008-03-25 Texas Instruments Incorporated Semiconductor device having a silicided gate electrode and method of manufacture therefor
JP4116990B2 (ja) * 2004-09-28 2008-07-09 富士通株式会社 電界効果型トランジスタおよびその製造方法
JP2006114681A (ja) * 2004-10-14 2006-04-27 Nec Electronics Corp 半導体装置及びその製造方法
JP2006120718A (ja) * 2004-10-19 2006-05-11 Toshiba Corp 半導体装置およびその製造方法
US7611943B2 (en) * 2004-10-20 2009-11-03 Texas Instruments Incorporated Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulation
EP1724818A3 (de) * 2005-05-16 2007-12-26 Interuniversitair Microelektronica Centrum ( Imec) Verfahren zur Herstellung vollsilicidierter Dual-Gates und mit diesem Verfahren erhältliche Halbleiterbauelemente
JP2006324628A (ja) * 2005-05-16 2006-11-30 Interuniv Micro Electronica Centrum Vzw 完全ケイ化ゲート形成方法及び当該方法によって得られたデバイス
US7473637B2 (en) 2005-07-20 2009-01-06 Micron Technology, Inc. ALD formed titanium nitride films
US7151023B1 (en) 2005-08-01 2006-12-19 International Business Machines Corporation Metal gate MOSFET by full semiconductor metal alloy conversion
WO2007074775A1 (ja) * 2005-12-26 2007-07-05 Nec Corporation Ｎｍｏｓｆｅｔ及びその製造方法並びにｃｍｏｓｆｅｔ及びその製造方法
US20070164323A1 (en) * 2006-01-18 2007-07-19 Micron Technology, Inc. CMOS gates with intermetallic compound tunable work functions
US20070164367A1 (en) * 2006-01-18 2007-07-19 Micron Technology, Inc. CMOS gates with solid-solution alloy tunable work functions
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
WO2008013125A1 (en) * 2006-07-25 2008-01-31 Nec Corporation Semiconductor device and method for manufacturing same
US20080206973A1 (en) * 2007-02-26 2008-08-28 Texas Instrument Inc. Process method to optimize fully silicided gate (FUSI) thru PAI implant
US7547596B2 (en) * 2007-08-01 2009-06-16 Texas Instruments Incorporated Method of enhancing drive current in a transistor
JP2009224509A (ja) * 2008-03-14 2009-10-01 Panasonic Corp 半導体装置及びその製造方法
CN101894749B (zh) * 2009-05-20 2013-03-20 中芯国际集成电路制造(北京)有限公司 半导体器件的栅极掺杂方法
CN106033718A (zh) * 2015-03-15 2016-10-19 中国科学院微电子研究所 一种金属硅化物的形成方法

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US5624869A (en) * 1994-04-13 1997-04-29 International Business Machines Corporation Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
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Also Published As

Publication number Publication date
CN1853266A (zh) 2006-10-25
TWI334632B (en) 2010-12-11
KR100818898B1 (ko) 2008-04-04
KR20060060723A (ko) 2006-06-05
US20050064636A1 (en) 2005-03-24
WO2005029579A1 (en) 2005-03-31
EP1668695A1 (de) 2006-06-14
JP2007534148A (ja) 2007-11-22
TW200512882A (en) 2005-04-01
DE602004026753D1 (de) 2010-06-02
EP1668695B1 (de) 2010-04-21
US7183182B2 (en) 2007-02-27
CN100419999C (zh) 2008-09-17
US20070128785A1 (en) 2007-06-07

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