ATE466331T1 - Datenverarbeitungsschaltung mit mehreren anweisungsarten, verfahren zum betrieb einer solchen datenschaltung und scheduling-verfahren für eine solche datenschaltung - Google Patents

Datenverarbeitungsschaltung mit mehreren anweisungsarten, verfahren zum betrieb einer solchen datenschaltung und scheduling-verfahren für eine solche datenschaltung

Info

Publication number
ATE466331T1
ATE466331T1 AT07808567T AT07808567T ATE466331T1 AT E466331 T1 ATE466331 T1 AT E466331T1 AT 07808567 T AT07808567 T AT 07808567T AT 07808567 T AT07808567 T AT 07808567T AT E466331 T1 ATE466331 T1 AT E466331T1
Authority
AT
Austria
Prior art keywords
instruction
instructions
circuit
mode
data
Prior art date
Application number
AT07808567T
Other languages
English (en)
Inventor
Jeroen Leijten
Hendrik Tjeerd Joannes Zwartenkot
Original Assignee
Silicon Hive Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Hive Bv filed Critical Silicon Hive Bv
Application granted granted Critical
Publication of ATE466331T1 publication Critical patent/ATE466331T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Devices For Executing Special Programs (AREA)
  • Communication Control (AREA)
AT07808567T 2006-09-06 2007-09-06 Datenverarbeitungsschaltung mit mehreren anweisungsarten, verfahren zum betrieb einer solchen datenschaltung und scheduling-verfahren für eine solche datenschaltung ATE466331T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP06120236 2006-09-06
PCT/NL2007/050434 WO2008030093A2 (en) 2006-09-06 2007-09-06 Data processing circuit with a plurality of instruction modes

Publications (1)

Publication Number Publication Date
ATE466331T1 true ATE466331T1 (de) 2010-05-15

Family

ID=38535383

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07808567T ATE466331T1 (de) 2006-09-06 2007-09-06 Datenverarbeitungsschaltung mit mehreren anweisungsarten, verfahren zum betrieb einer solchen datenschaltung und scheduling-verfahren für eine solche datenschaltung

Country Status (7)

Country Link
US (2) US8145888B2 (de)
EP (1) EP2069912B1 (de)
JP (3) JP5388851B2 (de)
KR (4) KR101306354B1 (de)
AT (1) ATE466331T1 (de)
DE (1) DE602007006215D1 (de)
WO (1) WO2008030093A2 (de)

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KR101647818B1 (ko) * 2010-04-13 2016-08-12 삼성전자주식회사 멀티 코어 사이의 데이터 전송 장치 및 방법
US20130061213A1 (en) * 2011-08-26 2013-03-07 Cognitive Electronics, Inc. Methods and systems for optimizing execution of a program in a parallel processing environment
US10055227B2 (en) 2012-02-07 2018-08-21 Qualcomm Incorporated Using the least significant bits of a called function's address to switch processor modes
US9213828B2 (en) 2012-02-08 2015-12-15 Arm Limited Data processing apparatus and method for protecting secure data and program code from non-secure access when switching between secure and less secure domains
US9477834B2 (en) 2012-02-08 2016-10-25 Arm Limited Maintaining secure data isolated from non-secure access when switching between domains
US10210349B2 (en) 2012-02-08 2019-02-19 Arm Limited Data processing apparatus and method using secure domain and less secure domain
GB2499287A (en) * 2012-02-08 2013-08-14 Advanced Risc Mach Ltd Exception handling in data processing with different security domains
US9116711B2 (en) 2012-02-08 2015-08-25 Arm Limited Exception handling in a data processing apparatus having a secure domain and a less secure domain
KR102179385B1 (ko) 2013-11-29 2020-11-16 삼성전자주식회사 명령어를 실행하는 방법 및 프로세서, 명령어를 부호화하는 방법 및 장치 및 기록매체
US9785800B2 (en) 2015-12-23 2017-10-10 Intel Corporation Non-tracked control transfers within control transfer enforcement
US20170185400A1 (en) 2015-12-23 2017-06-29 Intel Corporation Mode-specific endbranch for control flow termination
US10534610B2 (en) 2016-07-20 2020-01-14 International Business Machines Corporation PC-relative addressing and transmission
GB2553010B (en) * 2017-01-16 2019-03-06 Imagination Tech Ltd Efficient data selection for a processor
EP4009183B1 (de) 2018-10-18 2026-05-06 Shanghai Cambricon Information Technology Co., Ltd Netzwerk-on-chip-datenverarbeitungsverfahren und -vorrichtung
CN111079908B (zh) * 2018-10-18 2024-02-13 上海寒武纪信息科技有限公司 片上网络数据处理方法、存储介质、计算机设备和装置
CN111209231B (zh) * 2018-11-21 2021-05-11 上海寒武纪信息科技有限公司 数据处理方法、装置及相关产品
CN111210012B (zh) * 2018-11-21 2022-12-09 上海寒武纪信息科技有限公司 数据处理方法、装置及相关产品
CN114020330B (zh) * 2021-11-04 2023-11-03 苏州睿芯集成电路科技有限公司 Risc-v处理器验证中模式切换的方法、电子设备以及存储介质
CN119654619A (zh) * 2022-08-05 2025-03-18 Arm有限公司 无操作兼容指令
JP7421850B1 (ja) * 2022-10-21 2024-01-25 たけおかラボ株式会社 間接アドレス指定方式の条件ジャンプ命令を実行するプロセッサ、プログラム及び方法
CN117714711B (zh) * 2024-02-05 2024-04-30 北京象帝先计算技术有限公司 解码方法、解码系统、电子设备及可读存储介质

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JP2810068B2 (ja) * 1988-11-11 1998-10-15 株式会社日立製作所 プロセッサシステム、コンピュータシステム及び命令処理方法
US6189090B1 (en) 1997-09-17 2001-02-13 Sony Corporation Digital signal processor with variable width instructions
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JP3616556B2 (ja) * 1999-06-29 2005-02-02 株式会社東芝 拡張命令を処理する並列プロセッサ
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Also Published As

Publication number Publication date
KR101326414B1 (ko) 2013-11-11
US8145888B2 (en) 2012-03-27
KR20130109251A (ko) 2013-10-07
KR20090092753A (ko) 2009-09-01
US8838945B2 (en) 2014-09-16
KR101419668B1 (ko) 2014-07-15
JP2013218710A (ja) 2013-10-24
US20100185835A1 (en) 2010-07-22
WO2008030093A2 (en) 2008-03-13
JP5638107B2 (ja) 2014-12-10
KR20130087569A (ko) 2013-08-06
KR101398770B1 (ko) 2014-05-27
EP2069912B1 (de) 2010-04-28
EP2069912A2 (de) 2009-06-17
WO2008030093A3 (en) 2008-05-02
JP5388851B2 (ja) 2014-01-15
JP2010503107A (ja) 2010-01-28
DE602007006215D1 (de) 2010-06-10
KR101306354B1 (ko) 2013-09-09
JP5638108B2 (ja) 2014-12-10
JP2013218711A (ja) 2013-10-24
KR20130087568A (ko) 2013-08-06
US20120179894A1 (en) 2012-07-12

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