ATE467844T1 - System und verfahren zur jitter-einspeisung auf dem chip - Google Patents

System und verfahren zur jitter-einspeisung auf dem chip

Info

Publication number
ATE467844T1
ATE467844T1 AT05806076T AT05806076T ATE467844T1 AT E467844 T1 ATE467844 T1 AT E467844T1 AT 05806076 T AT05806076 T AT 05806076T AT 05806076 T AT05806076 T AT 05806076T AT E467844 T1 ATE467844 T1 AT E467844T1
Authority
AT
Austria
Prior art keywords
chip
loop
coverage
back tests
injecting jitter
Prior art date
Application number
AT05806076T
Other languages
English (en)
Inventor
Rodger Frank Schuttert
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE467844T1 publication Critical patent/ATE467844T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Dc Digital Transmission (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Control Of Electric Motors In General (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
AT05806076T 2004-11-15 2005-11-14 System und verfahren zur jitter-einspeisung auf dem chip ATE467844T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US62807004P 2004-11-15 2004-11-15
PCT/IB2005/053748 WO2006051508A1 (en) 2004-11-15 2005-11-14 System and method for on-chip jitter injection

Publications (1)

Publication Number Publication Date
ATE467844T1 true ATE467844T1 (de) 2010-05-15

Family

ID=35589282

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05806076T ATE467844T1 (de) 2004-11-15 2005-11-14 System und verfahren zur jitter-einspeisung auf dem chip

Country Status (8)

Country Link
US (1) US8169225B2 (de)
EP (1) EP1815262B1 (de)
JP (1) JP2008521272A (de)
KR (1) KR20070086147A (de)
CN (1) CN101057154B (de)
AT (1) ATE467844T1 (de)
DE (1) DE602005021243D1 (de)
WO (1) WO2006051508A1 (de)

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JP5289736B2 (ja) * 2006-09-29 2013-09-11 富士通セミコンダクター株式会社 送受信装置
US8803806B2 (en) * 2007-01-23 2014-08-12 Dell Products L.P. Notebook computer having an off-motherboard keyboard controller
US8073043B2 (en) * 2007-09-27 2011-12-06 Integrated Device Technology, Inc. Method for reliable injection of deterministic jitter for high speed transceiver simulation
US8249137B2 (en) * 2008-06-16 2012-08-21 Intel Corporation In-situ jitter tolerance testing for serial input output
US8283933B2 (en) * 2009-03-13 2012-10-09 Qualcomm, Incorporated Systems and methods for built in self test jitter measurement
JP2011171808A (ja) * 2010-02-16 2011-09-01 Renesas Electronics Corp 半導体装置、及びそのテスト方法
CN101834600B (zh) * 2010-04-21 2012-04-04 四川和芯微电子股份有限公司 多相时钟相位均匀性自修正系统及方法
US8453043B2 (en) * 2010-09-13 2013-05-28 Taiwan Semiconductor Manufacturing Company, Ltd. Built-in bit error rate test circuit
US9222972B1 (en) * 2010-09-17 2015-12-29 Altera Corporation On-die jitter generator
US8958515B2 (en) 2011-01-20 2015-02-17 Lsi Corporation SerDes jitter tolerance BIST in production loopback testing with enhanced spread spectrum clock generation circuit
US9577816B2 (en) 2012-03-13 2017-02-21 Rambus Inc. Clock and data recovery having shared clock generator
US9071407B2 (en) 2012-05-02 2015-06-30 Ramnus Inc. Receiver clock test circuitry and related methods and apparatuses
US9785604B2 (en) * 2013-02-15 2017-10-10 Intel Corporation Preset evaluation to improve input/output performance in high-speed serial interconnects
US20140306689A1 (en) * 2013-04-10 2014-10-16 Texas Instruments, Incorporated High resolution current pulse analog measurement
US9088399B1 (en) * 2014-02-03 2015-07-21 Xilinx, Inc. Circuit and method for testing jitter tolerance
CN104954044A (zh) * 2014-03-28 2015-09-30 北京大学 一种基于bist的高速串行io接口抖动容限测试方法和电路
US9898565B2 (en) 2015-11-25 2018-02-20 Synopsys, Inc. Clock jitter emulation
JP6235631B2 (ja) * 2016-02-08 2017-11-22 アンリツ株式会社 アイダイアグラム表示装置およびアイダイアグラム表示方法
CN106656229B (zh) * 2016-11-25 2019-02-26 硅谷数模半导体（北京）有限公司 抖动数据的注入方法和电路，及眼图监测器
US10156603B1 (en) 2017-06-14 2018-12-18 University Of Electronic Science And Technology Of China Apparatus for adding jitters to the edges of a pulse sequence
US10693589B2 (en) * 2018-06-18 2020-06-23 Huawei Technologies Co., Ltd. Serdes with jitter injection self stress mechanism
KR102949215B1 (ko) 2020-12-11 2026-04-09 삼성전자주식회사 내부 루프백 테스트를 수행하는 송수신기 및 그것의 동작 방법
US11984334B2 (en) * 2021-04-13 2024-05-14 Accenture Global Solutions Limited Anomaly detection method and system for manufacturing processes
US12540972B2 (en) 2021-09-24 2026-02-03 A.T.E. Solutions, Inc. Systems and methods for jitter injection with pre- and post-emphasis circuits in automatic testing equipment (ATE)
CN120498612B (zh) * 2025-07-07 2025-11-21 深圳市辰卓科技股份有限公司 高速串行信号测试方法、系统及半导体测试设备

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US4884286A (en) * 1985-12-12 1989-11-28 Texas Instruments Inc. Elastic buffer for local area networks
US5793822A (en) * 1995-10-16 1998-08-11 Symbios, Inc. Bist jitter tolerance measurement technique
CA2204089C (en) * 1997-04-30 2001-08-07 Mosaid Technologies Incorporated Digital delay locked loop
KR100295674B1 (ko) * 1999-01-12 2001-07-12 김영환 아날로그 혼용 디지탈 디엘엘
US6348826B1 (en) * 2000-06-28 2002-02-19 Intel Corporation Digital variable-delay circuit having voltage-mixing interpolator and methods of testing input/output buffers using same
US7035325B2 (en) * 2001-05-25 2006-04-25 Tektronix, Inc. Jitter measurement using mixed down topology
US7120215B2 (en) 2001-12-12 2006-10-10 Via Technologies, Inc. Apparatus and method for on-chip jitter measurement
US20030156545A1 (en) * 2002-02-15 2003-08-21 Masashi Shimanouchi Signal paths providing multiple test configurations
US7054358B2 (en) * 2002-04-29 2006-05-30 Advantest Corporation Measuring apparatus and measuring method
US7321617B2 (en) * 2002-07-09 2008-01-22 International Business Machines Corporation Data communication system with self-test feature
JP4158465B2 (ja) * 2002-09-10 2008-10-01 日本電気株式会社 クロック再生装置、および、クロック再生装置を用いた電子機器
KR100532415B1 (ko) * 2003-01-10 2005-12-02 삼성전자주식회사 돌발지터 정보를 차단할 수 있는 동기루프 회로 및 이의돌발지터 정보 차단방법
EP1464970A1 (de) 2003-04-04 2004-10-06 Agilent Technologies Inc Rückspeisungstest mit Verzögerungsgliedern
US7203460B2 (en) * 2003-10-10 2007-04-10 Texas Instruments Incorporated Automated test of receiver sensitivity and receiver jitter tolerance of an integrated circuit
US7095264B2 (en) * 2003-12-02 2006-08-22 International Business Machines Corporation Programmable jitter signal generator
US7165196B1 (en) * 2004-09-03 2007-01-16 Emc Corporation Method for testing serializers/de-serializers
US7348821B2 (en) * 2004-09-22 2008-03-25 Intel Corporation Programmable high-resolution timing jitter injectors high-resolution timing jitter injectors
CN101657731B (zh) * 2007-04-24 2012-10-10 爱德万测试株式会社 测试装置及测试方法

Also Published As

Publication number Publication date
US20100026314A1 (en) 2010-02-04
EP1815262B1 (de) 2010-05-12
JP2008521272A (ja) 2008-06-19
DE602005021243D1 (de) 2010-06-24
US8169225B2 (en) 2012-05-01
CN101057154B (zh) 2010-09-29
KR20070086147A (ko) 2007-08-27
CN101057154A (zh) 2007-10-17
EP1815262A1 (de) 2007-08-08
WO2006051508A1 (en) 2006-05-18

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