ATE470901T1 - Verfahren und vorrichtung zur durchführung einer pixelmittelungsanweisung - Google Patents
Verfahren und vorrichtung zur durchführung einer pixelmittelungsanweisungInfo
- Publication number
- ATE470901T1 ATE470901T1 AT03707618T AT03707618T ATE470901T1 AT E470901 T1 ATE470901 T1 AT E470901T1 AT 03707618 T AT03707618 T AT 03707618T AT 03707618 T AT03707618 T AT 03707618T AT E470901 T1 ATE470901 T1 AT E470901T1
- Authority
- AT
- Austria
- Prior art keywords
- bit
- pixel
- adder
- simd
- vector
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/18—Complex mathematical operations for evaluating statistical data, e.g. average values, frequency distributions, probability functions, regression analysis
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
- G06F7/49947—Rounding
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2200/00—Indexing scheme for image data processing or generation, in general
- G06T2200/28—Indexing scheme for image data processing or generation, in general involving image processing hardware
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Bioinformatics & Cheminformatics (AREA)
- Evolutionary Biology (AREA)
- Bioinformatics & Computational Biology (AREA)
- Algebra (AREA)
- Operations Research (AREA)
- Databases & Information Systems (AREA)
- Probability & Statistics with Applications (AREA)
- Life Sciences & Earth Sciences (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Executing Machine-Instructions (AREA)
- Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
- Ultra Sonic Daignosis Equipment (AREA)
- Facsimile Image Signal Circuits (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/081,926 US7035331B2 (en) | 2002-02-20 | 2002-02-20 | Method and apparatus for performing a pixel averaging instruction |
| PCT/US2003/002824 WO2003073315A1 (en) | 2002-02-20 | 2003-01-30 | Method and apparatus for performing a pixel averaging instruction |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE470901T1 true ATE470901T1 (de) | 2010-06-15 |
Family
ID=27733320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT03707618T ATE470901T1 (de) | 2002-02-20 | 2003-01-30 | Verfahren und vorrichtung zur durchführung einer pixelmittelungsanweisung |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7035331B2 (de) |
| EP (1) | EP1483683B1 (de) |
| CN (1) | CN1636201A (de) |
| AT (1) | ATE470901T1 (de) |
| AU (1) | AU2003208896A1 (de) |
| DE (1) | DE60332920D1 (de) |
| TW (1) | TWI241496B (de) |
| WO (1) | WO2003073315A1 (de) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3958662B2 (ja) * | 2002-09-25 | 2007-08-15 | 松下電器産業株式会社 | プロセッサ |
| GB2411975B (en) * | 2003-12-09 | 2006-10-04 | Advanced Risc Mach Ltd | Data processing apparatus and method for performing arithmetic operations in SIMD data processing |
| US7328230B2 (en) * | 2004-03-26 | 2008-02-05 | Intel Corporation | SIMD four-data element average instruction |
| US7529423B2 (en) * | 2004-03-26 | 2009-05-05 | Intel Corporation | SIMD four-pixel average instruction for imaging and video applications |
| US9557994B2 (en) * | 2004-07-13 | 2017-01-31 | Arm Limited | Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number |
| ITTO20040780A1 (it) * | 2004-11-09 | 2005-02-09 | St Microelectronics Srl | Procedimento e sistema per il trattamento di segnali a descrizioni multiple, relativo prodotto informatico |
| US20060277243A1 (en) * | 2005-06-02 | 2006-12-07 | International Business Machines Corporation | Alternate representation of integers for efficient implementation of addition of a sequence of multiprecision integers |
| US8036484B2 (en) * | 2007-10-16 | 2011-10-11 | Broadcom Corporation | In-place averaging of packed pixel data |
| US9405539B2 (en) * | 2013-07-31 | 2016-08-02 | Intel Corporation | Providing vector sub-byte decompression functionality |
| US10579338B2 (en) * | 2017-01-30 | 2020-03-03 | Arm Limited | Apparatus and method for processing input operand values |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB8707493D0 (en) | 1987-03-28 | 1987-08-05 | Stonefield Systems Plc | Cellular array processing |
| GB8827556D0 (en) | 1988-11-25 | 1988-12-29 | Crosfield Electronics Ltd | Data compression |
| JPH09102954A (ja) * | 1995-10-04 | 1997-04-15 | Matsushita Electric Ind Co Ltd | 1つまたは2つの予測ブロックからブロックの画素値を計算する方法 |
| US6058465A (en) * | 1996-08-19 | 2000-05-02 | Nguyen; Le Trong | Single-instruction-multiple-data processing in a multimedia signal processor |
| US5943250A (en) * | 1996-10-21 | 1999-08-24 | Samsung Electronics Co., Ltd. | Parallel multiplier that supports multiple numbers with different bit lengths |
| US5917739A (en) * | 1996-11-14 | 1999-06-29 | Samsung Electronics Co., Ltd. | Calculating the average of four integer numbers rounded towards zero in a single instruction cycle |
| KR100291383B1 (ko) * | 1996-11-18 | 2001-09-17 | 윤종용 | 디지털신호처리를위한명령을지원하는모듈계산장치및방법 |
| US5928316A (en) * | 1996-11-18 | 1999-07-27 | Samsung Electronics Co., Ltd. | Fused floating-point multiply-and-accumulate unit with carry correction |
| US5943251A (en) * | 1996-11-18 | 1999-08-24 | Samsung Electronics Co., Ltd. | Adder which handles multiple data with different data types |
| US6512523B1 (en) | 2000-03-27 | 2003-01-28 | Intel Corporation | Accurate averaging of elements using integer averaging |
| US6578063B1 (en) * | 2000-06-01 | 2003-06-10 | International Business Machines Corporation | 5-to-2 binary adder |
-
2002
- 2002-02-20 US US10/081,926 patent/US7035331B2/en not_active Expired - Lifetime
-
2003
- 2003-01-30 EP EP03707618A patent/EP1483683B1/de not_active Expired - Lifetime
- 2003-01-30 CN CN03804274.6A patent/CN1636201A/zh active Pending
- 2003-01-30 AT AT03707618T patent/ATE470901T1/de not_active IP Right Cessation
- 2003-01-30 WO PCT/US2003/002824 patent/WO2003073315A1/en not_active Ceased
- 2003-01-30 DE DE60332920T patent/DE60332920D1/de not_active Expired - Lifetime
- 2003-01-30 AU AU2003208896A patent/AU2003208896A1/en not_active Abandoned
- 2003-02-18 TW TW092103299A patent/TWI241496B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| DE60332920D1 (de) | 2010-07-22 |
| US20030158881A1 (en) | 2003-08-21 |
| EP1483683B1 (de) | 2010-06-09 |
| TW200405176A (en) | 2004-04-01 |
| AU2003208896A1 (en) | 2003-09-09 |
| US7035331B2 (en) | 2006-04-25 |
| HK1070702A1 (en) | 2005-06-24 |
| CN1636201A (zh) | 2005-07-06 |
| TWI241496B (en) | 2005-10-11 |
| WO2003073315A1 (en) | 2003-09-04 |
| EP1483683A1 (de) | 2004-12-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |