ATE478437T1 - Nichtflüchtige halbleiterspeicheranordnung - Google Patents

Nichtflüchtige halbleiterspeicheranordnung

Info

Publication number
ATE478437T1
ATE478437T1 AT01953182T AT01953182T ATE478437T1 AT E478437 T1 ATE478437 T1 AT E478437T1 AT 01953182 T AT01953182 T AT 01953182T AT 01953182 T AT01953182 T AT 01953182T AT E478437 T1 ATE478437 T1 AT E478437T1
Authority
AT
Austria
Prior art keywords
floating gate
separated
insulating layer
semiconductor memory
volatile semiconductor
Prior art date
Application number
AT01953182T
Other languages
English (en)
Inventor
Franciscus Widdershoven
Jurriaan Schmitz
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE478437T1 publication Critical patent/ATE478437T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Fats And Perfumes (AREA)
AT01953182T 2000-07-12 2001-06-29 Nichtflüchtige halbleiterspeicheranordnung ATE478437T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00202493 2000-07-12
PCT/EP2001/007452 WO2002005353A1 (en) 2000-07-12 2001-06-29 Semiconductor non-volatile memory device

Publications (1)

Publication Number Publication Date
ATE478437T1 true ATE478437T1 (de) 2010-09-15

Family

ID=8171795

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01953182T ATE478437T1 (de) 2000-07-12 2001-06-29 Nichtflüchtige halbleiterspeicheranordnung

Country Status (8)

Country Link
US (1) US6472706B2 (de)
EP (1) EP1228534B1 (de)
JP (1) JP2004503113A (de)
KR (1) KR100851206B1 (de)
AT (1) ATE478437T1 (de)
DE (1) DE60142825D1 (de)
TW (1) TW503528B (de)
WO (1) WO2002005353A1 (de)

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US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP4923321B2 (ja) * 2000-09-12 2012-04-25 ソニー株式会社 不揮発性半導体記憶装置の動作方法
DE60133259D1 (de) * 2000-12-15 2008-04-30 Halo Lsi Design & Device Tech Schnelles Programmier- und Programmierverifikationsverfahren
US6614692B2 (en) 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
TW476144B (en) * 2001-02-02 2002-02-11 Macronix Int Co Ltd Non-volatile memory
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
US6897522B2 (en) * 2001-10-31 2005-05-24 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6925007B2 (en) * 2001-10-31 2005-08-02 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6700818B2 (en) 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
EP1376676A3 (de) * 2002-06-24 2008-08-20 Interuniversitair Microelektronica Centrum Vzw Multibit-Festwertspeicherbauelement und Verfahren
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6773988B1 (en) * 2002-09-13 2004-08-10 Advanced Micro Devices, Inc. Memory wordline spacer
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US6770933B2 (en) * 2002-12-11 2004-08-03 Texas Instruments Incorporated Single poly eeprom with improved coupling ratio
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
KR100528466B1 (ko) * 2003-02-12 2005-11-15 삼성전자주식회사 비휘발성 소노스 메모리 소자 및 그 제조방법
US7142464B2 (en) 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
US7123532B2 (en) 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
JP4629982B2 (ja) * 2004-02-13 2011-02-09 ルネサスエレクトロニクス株式会社 不揮発性記憶素子およびその製造方法
JP4546117B2 (ja) * 2004-03-10 2010-09-15 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US7317633B2 (en) 2004-07-06 2008-01-08 Saifun Semiconductors Ltd Protection of NROM devices from charge damage
US7095655B2 (en) 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
US7119396B2 (en) * 2004-10-08 2006-10-10 Silicon Storage Technology, Inc. NROM device
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7535765B2 (en) 2004-12-09 2009-05-19 Saifun Semiconductors Ltd. Non-volatile memory device and method for reading cells
CN1838323A (zh) 2005-01-19 2006-09-27 赛芬半导体有限公司 可预防固定模式编程的方法
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
EP1746645A3 (de) 2005-07-18 2009-01-21 Saifun Semiconductors Ltd. Speicherzellenanordnung mit sub-minimalem Wortleitungsabstand und Verfahren zu deren Herstellung
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
CN100452356C (zh) * 2005-08-19 2009-01-14 力晶半导体股份有限公司 非挥发性存储器及其制造方法与操作方法
US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7902589B2 (en) * 2006-02-17 2011-03-08 Macronix International Co., Ltd. Dual gate multi-bit semiconductor memory array
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7638835B2 (en) 2006-02-28 2009-12-29 Saifun Semiconductors Ltd. Double density NROM with nitride strips (DDNS)
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
JP4659677B2 (ja) * 2006-05-23 2011-03-30 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法
US7605579B2 (en) 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
KR101531885B1 (ko) * 2009-05-12 2015-06-29 주식회사 동부하이텍 반도체 소자의 제조 방법
TWI473253B (zh) * 2010-04-07 2015-02-11 旺宏電子股份有限公司 具有連續電荷儲存介電堆疊的非揮發記憶陣列
US9406896B2 (en) * 2014-01-10 2016-08-02 Palo Alto Research Center Incorporated Pre-fabricated substrate for printed electronic devices
KR101552921B1 (ko) * 2014-09-29 2015-09-15 매그나칩 반도체 유한회사 비휘발성 메모리 소자 및 그 제조 방법
US10937879B2 (en) * 2017-11-30 2021-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof

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KR940006094B1 (ko) 1989-08-17 1994-07-06 삼성전자 주식회사 불휘발성 반도체 기억장치 및 그 제조방법
US5583810A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Method for programming a semiconductor memory device
US5293328A (en) 1992-01-15 1994-03-08 National Semiconductor Corporation Electrically reprogrammable EPROM cell with merged transistor and optiumum area
US5910912A (en) 1992-10-30 1999-06-08 International Business Machines Corporation Flash EEPROM with dual-sidewall gate
US5408115A (en) * 1994-04-04 1995-04-18 Motorola Inc. Self-aligned, split-gate EEPROM device
KR0150048B1 (ko) 1994-12-23 1998-10-01 김주용 플래쉬 이이피롬 셀 및 그 제조방법
DE19612676C2 (de) * 1996-03-29 2002-06-06 Infineon Technologies Ag Anordnung von Halbleiter-Speicherzellen mit zwei Floating-Gates in einem Zellenfeld und Verfahren zum Betrieb einer nichtflüchtigen Halbleiter-Speicherzelle
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
DE69832019T2 (de) 1997-09-09 2006-07-20 Interuniversitair Micro-Electronica Centrum Vzw Verfahren zur Löschung und Programmierung eines Speichers in Kleinspannungs-Anwendungen und Anwendungen mit geringer Leistung
US6133098A (en) * 1999-05-17 2000-10-17 Halo Lsi Design & Device Technology, Inc. Process for making and programming and operating a dual-bit multi-level ballistic flash memory

Also Published As

Publication number Publication date
DE60142825D1 (de) 2010-09-30
US6472706B2 (en) 2002-10-29
EP1228534B1 (de) 2010-08-18
EP1228534A1 (de) 2002-08-07
KR20020033792A (ko) 2002-05-07
US20020005545A1 (en) 2002-01-17
JP2004503113A (ja) 2004-01-29
WO2002005353A1 (en) 2002-01-17
TW503528B (en) 2002-09-21
KR100851206B1 (ko) 2008-08-07

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