ATE389937T1 - Schnelles programmier- und programmierverifikationsverfahren - Google Patents

Schnelles programmier- und programmierverifikationsverfahren

Info

Publication number
ATE389937T1
ATE389937T1 AT01480133T AT01480133T ATE389937T1 AT E389937 T1 ATE389937 T1 AT E389937T1 AT 01480133 T AT01480133 T AT 01480133T AT 01480133 T AT01480133 T AT 01480133T AT E389937 T1 ATE389937 T1 AT E389937T1
Authority
AT
Austria
Prior art keywords
programming
program
control gate
fast
verification procedure
Prior art date
Application number
AT01480133T
Other languages
English (en)
Inventor
Seiki Ogura
Tomoko Ogura
Nori Ogura
Original Assignee
Halo Lsi Design & Device Tech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Halo Lsi Design & Device Tech filed Critical Halo Lsi Design & Device Tech
Application granted granted Critical
Publication of ATE389937T1 publication Critical patent/ATE389937T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Circuits Of Receivers In General (AREA)
  • Debugging And Monitoring (AREA)
  • Storage Device Security (AREA)
AT01480133T 2000-12-15 2001-12-14 Schnelles programmier- und programmierverifikationsverfahren ATE389937T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25582400P 2000-12-15 2000-12-15

Publications (1)

Publication Number Publication Date
ATE389937T1 true ATE389937T1 (de) 2008-04-15

Family

ID=22970026

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01480133T ATE389937T1 (de) 2000-12-15 2001-12-14 Schnelles programmier- und programmierverifikationsverfahren

Country Status (7)

Country Link
US (8) US6549463B2 (de)
EP (1) EP1215680B1 (de)
JP (1) JP4050048B2 (de)
KR (1) KR100880547B1 (de)
AT (1) ATE389937T1 (de)
DE (1) DE60133259D1 (de)
TW (1) TW577082B (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60133259D1 (de) * 2000-12-15 2008-04-30 Halo Lsi Design & Device Tech Schnelles Programmier- und Programmierverifikationsverfahren
JP4084922B2 (ja) * 2000-12-22 2008-04-30 株式会社ルネサステクノロジ 不揮発性記憶装置の書込み方法
WO2002097821A1 (en) * 2001-05-25 2002-12-05 Fujitsu Limited Nonvolatile semiconductor storage device
JP2003151290A (ja) * 2001-07-06 2003-05-23 Halo Lsi Inc コントロール・ゲート及びワード線電圧の昇圧回路
US6925007B2 (en) * 2001-10-31 2005-08-02 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6897522B2 (en) * 2001-10-31 2005-05-24 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6795349B2 (en) * 2002-02-28 2004-09-21 Sandisk Corporation Method and system for efficiently reading and programming of dual cell memory elements
JP3900979B2 (ja) * 2002-03-14 2007-04-04 セイコーエプソン株式会社 不揮発性レジスタおよび半導体装置
US6747893B2 (en) * 2002-03-14 2004-06-08 Intel Corporation Storing data in non-volatile memory devices
JP3843869B2 (ja) * 2002-03-15 2006-11-08 セイコーエプソン株式会社 不揮発性半導体記憶装置
US6888755B2 (en) * 2002-10-28 2005-05-03 Sandisk Corporation Flash memory cell arrays having dual control gates per memory cell charge storage element
US7031192B1 (en) 2002-11-08 2006-04-18 Halo Lsi, Inc. Non-volatile semiconductor memory and driving method
JP2004348792A (ja) * 2003-05-20 2004-12-09 Sharp Corp 半導体記憶装置、表示装置及び携帯電子機器
US6992917B2 (en) * 2003-12-15 2006-01-31 International Business Machines Corporation Integrated circuit with reduced body effect sensitivity
US20050251617A1 (en) * 2004-05-07 2005-11-10 Sinclair Alan W Hybrid non-volatile memory system
US7206224B1 (en) * 2004-04-16 2007-04-17 Spansion Llc Methods and systems for high write performance in multi-bit flash memory devices
WO2005109438A2 (en) * 2004-05-06 2005-11-17 Halo Lsi, Inc. Non-volatile memory dynamic operations
JP4422556B2 (ja) * 2004-06-10 2010-02-24 株式会社ルネサステクノロジ 不揮発性半導体記憶装置およびその書き込み方法
US7145372B2 (en) * 2004-08-31 2006-12-05 Micron Technology, Inc. Startup circuit and method
CN100543875C (zh) * 2004-09-01 2009-09-23 旺宏电子股份有限公司 非易失存储器的编程方法
JP2006278987A (ja) 2005-03-30 2006-10-12 Nec Electronics Corp 不揮発性記憶素子およびその製造方法
US7180779B2 (en) * 2005-07-11 2007-02-20 Atmel Corporation Memory architecture with enhanced over-erase tolerant control gate scheme
US7388252B2 (en) * 2005-09-23 2008-06-17 Macronix International Co., Ltd. Two-bits per cell not-and-gate (NAND) nitride trap memory
US7951669B2 (en) * 2006-04-13 2011-05-31 Sandisk Corporation Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element
JP2009076188A (ja) * 2007-08-24 2009-04-09 Renesas Technology Corp 不揮発性半導体記憶装置
US7808833B2 (en) * 2008-01-28 2010-10-05 Qimonda Flash Gmbh Method of operating an integrated circuit, integrated circuit and method to determine an operating point
CN101968972B (zh) * 2010-07-23 2016-04-13 上海华虹宏力半导体制造有限公司 分裂栅快闪存储单元的编程验证方法
CN101986389B (zh) * 2010-10-12 2015-06-24 上海华虹宏力半导体制造有限公司 闪存单元、闪存装置及其编程方法
US9098553B2 (en) 2013-03-15 2015-08-04 Gridglo Llc System and method for remote activity detection
US9082490B2 (en) * 2013-06-18 2015-07-14 Flashsilicon Incorporation Ultra-low power programming method for N-channel semiconductor non-volatile memory
TWI627636B (zh) * 2017-05-23 2018-06-21 旺宏電子股份有限公司 感測放大器以及用於其位元線電壓補償的方法
US11507816B2 (en) * 2019-09-19 2022-11-22 Silicon Storage Technology, Inc. Precision tuning for the programming of analog neural memory in a deep learning artificial neural network
CN113129940B (zh) * 2019-12-30 2025-02-07 兆易创新科技集团股份有限公司 一种闪存及其制造方法
EP4047802A1 (de) * 2021-02-17 2022-08-24 Schaffner EMV AG Emi-aktiver filter

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BR8807352A (pt) 1987-02-13 1990-03-01 Dow Chemical Co Metodo para fabricar dispositivo de armazenamento de memoria otica e dispositivo de armazenamento otico
US5784327A (en) * 1991-06-12 1998-07-21 Hazani; Emanuel Memory cell array selection circuits
US5357462A (en) * 1991-09-24 1994-10-18 Kabushiki Kaisha Toshiba Electrically erasable and programmable non-volatile semiconductor memory with automatic write-verify controller
US7071060B1 (en) * 1996-02-28 2006-07-04 Sandisk Corporation EEPROM with split gate source side infection with sidewall spacers
US5712180A (en) * 1992-01-14 1998-01-27 Sundisk Corporation EEPROM with split gate source side injection
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5592415A (en) * 1992-07-06 1997-01-07 Hitachi, Ltd. Non-volatile semiconductor memory
JP2541087B2 (ja) * 1992-10-30 1996-10-09 日本電気株式会社 不揮発性半導体記憶装置のデ―タ消去方法
JP3252306B2 (ja) * 1993-08-10 2002-02-04 株式会社日立製作所 半導体不揮発性記憶装置
US5467308A (en) * 1994-04-05 1995-11-14 Motorola Inc. Cross-point eeprom memory array
US5422504A (en) * 1994-05-02 1995-06-06 Motorola Inc. EEPROM memory device having a sidewall spacer floating gate electrode and process
DE19523775C2 (de) * 1994-06-29 2001-12-06 Toshiba Kawasaki Kk Nichtflüchtige Halbleiterspeichervorrichtung
US5694356A (en) * 1994-11-02 1997-12-02 Invoice Technology, Inc. High resolution analog storage EPROM and flash EPROM
US5541130A (en) * 1995-06-07 1996-07-30 International Business Machines Corporation Process for making and programming a flash memory array
JP3517489B2 (ja) * 1995-09-04 2004-04-12 株式会社日立製作所 不揮発性半導体記憶装置
JP3184082B2 (ja) * 1995-11-24 2001-07-09 日本電気株式会社 不揮発性半導体記憶装置
US5712815A (en) * 1996-04-22 1998-01-27 Advanced Micro Devices, Inc. Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells
JP3404712B2 (ja) * 1996-05-15 2003-05-12 株式会社東芝 不揮発性半導体記憶装置及びその書き込み方法
US5748538A (en) * 1996-06-17 1998-05-05 Aplus Integrated Circuits, Inc. OR-plane memory cell array for flash memory with bit-based write capability, and methods for programming and erasing the memory cell array
TW367503B (en) * 1996-11-29 1999-08-21 Sanyo Electric Co Non-volatile semiconductor device
JP3481817B2 (ja) * 1997-04-07 2003-12-22 株式会社東芝 半導体記憶装置
US5889303A (en) * 1997-04-07 1999-03-30 Motorola, Inc. Split-Control gate electrically erasable programmable read only memory (EEPROM) cell
US6031760A (en) * 1997-07-29 2000-02-29 Kabushiki Kaisha Toshiba Semiconductor memory device and method of programming the same
IL125604A (en) * 1997-07-30 2004-03-28 Saifun Semiconductors Ltd Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge
US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6108238A (en) * 1997-09-11 2000-08-22 Kabushiki Kaisha Toshiba Programmable semiconductor memory device having program voltages and verify voltages
KR100287885B1 (ko) * 1997-12-31 2001-05-02 김영환 반도체 메모리 장치
KR100327421B1 (ko) * 1997-12-31 2002-07-27 주식회사 하이닉스반도체 비휘발성 메모리 소자의 프로그램 시스템 및 그의 프로그램 방법
US6353242B1 (en) * 1998-03-30 2002-03-05 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
JPH11317085A (ja) * 1998-05-08 1999-11-16 Sony Corp プログラム・ベリファイ回路及びプログラム・ベリファイ方法
US6208542B1 (en) * 1998-06-30 2001-03-27 Sandisk Corporation Techniques for storing digital data in an analog or multilevel memory
US6180461B1 (en) * 1998-08-03 2001-01-30 Halo Lsi Design & Device Technology, Inc. Double sidewall short channel split gate flash memory
JP2000138300A (ja) * 1998-10-30 2000-05-16 Sony Corp 不揮発性半導体記憶装置及びその書き込み方法
US6975539B2 (en) * 1999-01-14 2005-12-13 Silicon Storage Technology, Inc. Digital multilevel non-volatile memory system
US7031214B2 (en) * 1999-01-14 2006-04-18 Silicon Storage Technology, Inc. Digital multilevel memory system having multistage autozero sensing
US6133098A (en) * 1999-05-17 2000-10-17 Halo Lsi Design & Device Technology, Inc. Process for making and programming and operating a dual-bit multi-level ballistic flash memory
US6248633B1 (en) 1999-10-25 2001-06-19 Halo Lsi Design & Device Technology, Inc. Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
US6490204B2 (en) * 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
US6292394B1 (en) * 2000-06-29 2001-09-18 Saifun Semiconductors Ltd. Method for programming of a semiconductor memory cell
TW503528B (en) * 2000-07-12 2002-09-21 Koninkl Philips Electronics Nv Semiconductor device
JP2002170891A (ja) * 2000-11-21 2002-06-14 Halo Lsi Design & Device Technol Inc デュアルビット多準位バリスティックｍｏｎｏｓメモリの製造、プログラミング、および動作のプロセス
DE60133619T2 (de) * 2000-12-05 2009-06-10 Halo Lsi Design And Device Technology Inc. Programmier- und Löschverfahren in Zwilling-MONOS-Zellenspeichern
DE60133259D1 (de) * 2000-12-15 2008-04-30 Halo Lsi Design & Device Tech Schnelles Programmier- und Programmierverifikationsverfahren

Also Published As

Publication number Publication date
US6636439B1 (en) 2003-10-21
US20020075725A1 (en) 2002-06-20
JP4050048B2 (ja) 2008-02-20
US6856545B2 (en) 2005-02-15
US20030123293A1 (en) 2003-07-03
US20030185053A1 (en) 2003-10-02
US6628546B2 (en) 2003-09-30
US20030123292A1 (en) 2003-07-03
EP1215680A3 (de) 2004-01-21
US20030128588A1 (en) 2003-07-10
KR20020071442A (ko) 2002-09-12
EP1215680B1 (de) 2008-03-19
US6549463B2 (en) 2003-04-15
US7046553B2 (en) 2006-05-16
US6628547B2 (en) 2003-09-30
EP1215680A2 (de) 2002-06-19
US20030123308A1 (en) 2003-07-03
US6807105B2 (en) 2004-10-19
DE60133259D1 (de) 2008-04-30
US20030123290A1 (en) 2003-07-03
US6611461B2 (en) 2003-08-26
TW577082B (en) 2004-02-21
JP2002230988A (ja) 2002-08-16
KR100880547B1 (ko) 2009-01-30
US20030123291A1 (en) 2003-07-03

Similar Documents

Publication Publication Date Title
ATE389937T1 (de) Schnelles programmier- und programmierverifikationsverfahren
CN101667446B (zh) 存储器及其读取方法
EP1077450A3 (de) Nichtflüchtiger Speicher Typ NAND
ATE331289T1 (de) Hintergrund-ausführung einer operation mit speicherzellen
ATE249676T1 (de) Prüfungsschaltung zum trimmen von referenzzellen
JPH01192092A (ja) 電気的消去可能不揮発性半導体記憶装置
DE60126582D1 (de) Programmier- und Löschmethode für eine Referenzzelle eines NROM Speichers
ATE233937T1 (de) Schaltungsausführung zur reduzierung des bitleitungslekcstroms bei programmierungs-und überlöschungskorrekturmodus in einem flash-eeprom
ATE213562T1 (de) Verfahren zum programmieren einer flash-eeprom- speicherzelle unter optimierung des niedrigen leistungsverbrauchs und verfahren zum löschen dieser zelle
US5852582A (en) Non-volatile storage device refresh time detector
KR20000020101A (ko) 불 휘발성 반도체 메모리 장치
CN107195319A (zh) 灵敏放大器电路
US7385857B2 (en) Non-volatile, static random access memory with regulated erase saturation and program window
CN101872642A (zh) 随机存储器的存储读取方法
US8437198B2 (en) Method for discharging a voltage from a capacitance in a memory device
TW200713281A (en) Nonvolatile memory cell programming
CN206340344U (zh) 一种选通开关电路及包含该电路的存储器
US9484106B2 (en) Nonvolatile semiconductor memory
KR960035649A (ko) 플래쉬이이피롬셀의 문턱전압 자동 검증회로
CN103956179B (zh) 一种灵敏放大器及应用其的存储系统
CN1321375C (zh) 存储器读取装置及读取方法
JP3417817B2 (ja) 不揮発性半導体メモリ
CN108198818B (zh) Sonos闪存单元及其操作方法
CN106158025B (zh) 闪存的数据写入方法与其控制装置
CN103971737A (zh) 闪存及其相关程划方法

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties