ATE481714T1 - Segmentierte bit-abtastung zur programmierungsprüfung - Google Patents
Segmentierte bit-abtastung zur programmierungsprüfungInfo
- Publication number
- ATE481714T1 ATE481714T1 AT07864477T AT07864477T ATE481714T1 AT E481714 T1 ATE481714 T1 AT E481714T1 AT 07864477 T AT07864477 T AT 07864477T AT 07864477 T AT07864477 T AT 07864477T AT E481714 T1 ATE481714 T1 AT E481714T1
- Authority
- AT
- Austria
- Prior art keywords
- programming
- volatile storage
- storage elements
- bit sampling
- segmented bit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Image Processing (AREA)
- Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/563,585 US7545681B2 (en) | 2006-11-27 | 2006-11-27 | Segmented bitscan for verification of programming |
| US11/563,590 US7440319B2 (en) | 2006-11-27 | 2006-11-27 | Apparatus with segmented bitscan for verification of programming |
| PCT/US2007/084872 WO2008067185A1 (en) | 2006-11-27 | 2007-11-15 | Segmented bitscan for verification of programming |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE481714T1 true ATE481714T1 (de) | 2010-10-15 |
Family
ID=39167421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT07864477T ATE481714T1 (de) | 2006-11-27 | 2007-11-15 | Segmentierte bit-abtastung zur programmierungsprüfung |
Country Status (8)
| Country | Link |
|---|---|
| EP (1) | EP2074627B1 (de) |
| JP (1) | JP5067645B2 (de) |
| KR (1) | KR101100358B1 (de) |
| CN (1) | CN101589437B (de) |
| AT (1) | ATE481714T1 (de) |
| DE (1) | DE602007009277D1 (de) |
| TW (1) | TWI369686B (de) |
| WO (1) | WO2008067185A1 (de) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7545681B2 (en) | 2006-11-27 | 2009-06-09 | Sandisk Corporation | Segmented bitscan for verification of programming |
| CO6170067A1 (es) * | 2008-12-12 | 2010-06-18 | Ecopetrol Sa | Unidad de drenaje auto-sellante para separacion de fluidos inmiscibles de diferente densidad |
| US8400854B2 (en) * | 2009-09-11 | 2013-03-19 | Sandisk Technologies Inc. | Identifying at-risk data in non-volatile storage |
| JP2011123964A (ja) * | 2009-12-11 | 2011-06-23 | Toshiba Corp | 半導体記憶装置 |
| US8174895B2 (en) * | 2009-12-15 | 2012-05-08 | Sandisk Technologies Inc. | Programming non-volatile storage with fast bit detection and verify skip |
| WO2011073710A1 (en) | 2009-12-16 | 2011-06-23 | Sandisk Il Ltd | Auxiliary parity bits for data written in multi-level cells |
| CN103258570B (zh) * | 2012-02-15 | 2016-05-11 | 旺宏电子股份有限公司 | 一种记忆装置及产生程序化偏压脉冲的方法和集成电路 |
| JP6088675B1 (ja) | 2016-02-02 | 2017-03-01 | ウィンボンド エレクトロニクス コーポレーション | 半導体記憶装置 |
| KR102781462B1 (ko) * | 2019-01-23 | 2025-03-17 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치, 컨트롤러 및 이들의 동작 방법 |
| US10714198B1 (en) | 2019-06-04 | 2020-07-14 | Sandisk Technologies Llc | Dynamic 1-tier scan for high performance 3D NAND |
| US12499953B2 (en) * | 2023-11-02 | 2025-12-16 | Nxp B.V. | Wipe-out and verification of a non-volatile memory |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2787601A1 (fr) * | 1998-12-22 | 2000-06-23 | Gemplus Card Int | Systeme de memorisation comprenant des moyens de gestion d'une memoire avec anti-usure et procede de gestion anti-usure d'une memoire |
| US6426893B1 (en) * | 2000-02-17 | 2002-07-30 | Sandisk Corporation | Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
| JP4250325B2 (ja) * | 2000-11-01 | 2009-04-08 | 株式会社東芝 | 半導体記憶装置 |
| CN1466150A (zh) * | 2002-06-05 | 2004-01-07 | 力旺电子股份有限公司 | 快闪存储器的分页缓冲器 |
| JP4135680B2 (ja) * | 2004-05-31 | 2008-08-20 | ソニー株式会社 | 半導体記憶装置および信号処理システム |
| JP2005353242A (ja) * | 2004-06-14 | 2005-12-22 | Toshiba Corp | 不揮発性半導体記憶装置及びそのデータ書き込み方法 |
| US7437653B2 (en) * | 2004-12-22 | 2008-10-14 | Sandisk Corporation | Erased sector detection mechanisms |
| JP4874721B2 (ja) * | 2006-06-23 | 2012-02-15 | 株式会社東芝 | 半導体記憶装置 |
| US7355892B2 (en) * | 2006-06-30 | 2008-04-08 | Sandisk Corporation | Partial page fail bit detection in flash memory devices |
-
2007
- 2007-11-15 JP JP2009538460A patent/JP5067645B2/ja active Active
- 2007-11-15 AT AT07864477T patent/ATE481714T1/de not_active IP Right Cessation
- 2007-11-15 CN CN2007800441479A patent/CN101589437B/zh active Active
- 2007-11-15 DE DE602007009277T patent/DE602007009277D1/de active Active
- 2007-11-15 WO PCT/US2007/084872 patent/WO2008067185A1/en not_active Ceased
- 2007-11-15 KR KR1020097013318A patent/KR101100358B1/ko active Active
- 2007-11-15 EP EP07864477A patent/EP2074627B1/de active Active
- 2007-11-22 TW TW096144333A patent/TWI369686B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TW200839771A (en) | 2008-10-01 |
| CN101589437A (zh) | 2009-11-25 |
| CN101589437B (zh) | 2012-08-29 |
| TWI369686B (en) | 2012-08-01 |
| JP2010511263A (ja) | 2010-04-08 |
| JP5067645B2 (ja) | 2012-11-07 |
| EP2074627B1 (de) | 2010-09-15 |
| EP2074627A1 (de) | 2009-07-01 |
| DE602007009277D1 (de) | 2010-10-28 |
| KR20090098844A (ko) | 2009-09-17 |
| WO2008067185A1 (en) | 2008-06-05 |
| KR101100358B1 (ko) | 2011-12-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |