ATE481733T1 - Hochselektiver ätzprozess für oxide - Google Patents

Hochselektiver ätzprozess für oxide

Info

Publication number
ATE481733T1
ATE481733T1 AT98960430T AT98960430T ATE481733T1 AT E481733 T1 ATE481733 T1 AT E481733T1 AT 98960430 T AT98960430 T AT 98960430T AT 98960430 T AT98960430 T AT 98960430T AT E481733 T1 ATE481733 T1 AT E481733T1
Authority
AT
Austria
Prior art keywords
silicon oxide
substrate
highly selective
oxides
etching process
Prior art date
Application number
AT98960430T
Other languages
English (en)
Inventor
Randhir Thakur
James Pan
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE481733T1 publication Critical patent/ATE481733T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching

Landscapes

  • Semiconductor Memories (AREA)
  • Weting (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
AT98960430T 1997-11-24 1998-11-24 Hochselektiver ätzprozess für oxide ATE481733T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/977,251 US6126847A (en) 1997-11-24 1997-11-24 High selectivity etching process for oxides
PCT/US1998/025091 WO1999027573A1 (en) 1997-11-24 1998-11-24 High selectivity etching process for oxides

Publications (1)

Publication Number Publication Date
ATE481733T1 true ATE481733T1 (de) 2010-10-15

Family

ID=25524965

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98960430T ATE481733T1 (de) 1997-11-24 1998-11-24 Hochselektiver ätzprozess für oxide

Country Status (8)

Country Link
US (3) US6126847A (de)
EP (1) EP1034563B1 (de)
JP (2) JP3733024B2 (de)
KR (1) KR100458658B1 (de)
AT (1) ATE481733T1 (de)
AU (1) AU1602299A (de)
DE (1) DE69841902D1 (de)
WO (1) WO1999027573A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6126847A (en) * 1997-11-24 2000-10-03 Micron Technology Inc. High selectivity etching process for oxides
US6054379A (en) * 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US7115422B1 (en) 1998-10-23 2006-10-03 Micron Technology, Inc. Separation apparatus including porous silicon column
US6762057B1 (en) * 1998-10-23 2004-07-13 Micron Technology, Inc. Separation apparatus including porous silicon column
KR100434537B1 (ko) * 1999-03-31 2004-06-05 삼성전자주식회사 다공질 실리콘 혹은 다공질 산화 실리콘을 이용한 두꺼운 희생층을 가진 다층 구조 웨이퍼 및 그 제조방법
US6544842B1 (en) * 1999-05-01 2003-04-08 Micron Technology, Inc. Method of forming hemisphere grained silicon on a template on a semiconductor work object
KR100470165B1 (ko) * 1999-06-28 2005-02-07 주식회사 하이닉스반도체 반도체소자 제조 방법
US6635943B1 (en) * 1999-11-30 2003-10-21 Advanced Micro Devices, Inc. Method and system for reducing charge gain and charge loss in interlayer dielectric formation
KR100381011B1 (ko) * 2000-11-13 2003-04-26 한국전자통신연구원 멤즈소자 제조용 미세구조체를 고착없이 띄우는 방법
US6518117B2 (en) * 2001-03-29 2003-02-11 Micron Technology, Inc. Methods of forming nitrogen-containing masses, silicon nitride layers, and capacitor constructions
US7183201B2 (en) * 2001-07-23 2007-02-27 Applied Materials, Inc. Selective etching of organosilicate films over silicon oxide stop etch layers
US6936183B2 (en) * 2001-10-17 2005-08-30 Applied Materials, Inc. Etch process for etching microstructures
US6768440B1 (en) * 2003-03-28 2004-07-27 Zilog, Inc. Digital-to-analog converters with reduced parasitics and associated methods
US7214978B2 (en) * 2004-02-27 2007-05-08 Micron Technology, Inc. Semiconductor fabrication that includes surface tension control
KR100771865B1 (ko) 2006-01-18 2007-11-01 삼성전자주식회사 스토리지 캐패시터와 고내압 캐패시터를 구비하는 반도체소자의 제조방법 및 그를 사용하여 제조된 반도체 소자

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2218567A (en) * 1988-05-13 1989-11-15 Philips Electronic Associated A method of forming an epitaxial layer of silicon
US5235995A (en) * 1989-03-27 1993-08-17 Semitool, Inc. Semiconductor processor apparatus with dynamic wafer vapor treatment and particulate volatilization
DE68927726T2 (de) * 1988-07-20 1997-07-17 Hashimoto Chemical Ind Co Einrichtung zum Trockenätzen mit einem Generator zum Erzeugen von wasserfreiem Flusssäuregas
US5238500A (en) * 1990-05-15 1993-08-24 Semitool, Inc. Aqueous hydrofluoric and hydrochloric acid vapor processing of semiconductor wafers
US5332445A (en) * 1990-05-15 1994-07-26 Semitool, Inc. Aqueous hydrofluoric acid vapor processing of semiconductor wafers
DE4123228C2 (de) * 1991-07-12 1994-05-26 Siemens Ag Verfahren zur Dotierstoffkonzentrationsbestimmung mittels Ätzratenbestimmung in Borphosphorsilikatglasschichten für integrierte Halbleiter
US5228206A (en) * 1992-01-15 1993-07-20 Submicron Systems, Inc. Cluster tool dry cleaning system
US5234540A (en) * 1992-04-30 1993-08-10 Submicron Systems, Inc. Process for etching oxide films in a sealed photochemical reactor
JP2833946B2 (ja) * 1992-12-08 1998-12-09 日本電気株式会社 エッチング方法および装置
US5340765A (en) * 1993-08-13 1994-08-23 Micron Semiconductor, Inc. Method for forming enhanced capacitance stacked capacitor structures using hemi-spherical grain polysilicon
US5494841A (en) * 1993-10-15 1996-02-27 Micron Semiconductor, Inc. Split-polysilicon CMOS process for multi-megabit dynamic memories incorporating stacked container capacitor cells
US5407534A (en) * 1993-12-10 1995-04-18 Micron Semiconductor, Inc. Method to prepare hemi-spherical grain (HSG) silicon using a fluorine based gas mixture and high vacuum anneal
US5635102A (en) * 1994-09-28 1997-06-03 Fsi International Highly selective silicon oxide etching method
US5567332A (en) * 1995-06-09 1996-10-22 Fsi International Micro-machine manufacturing process
US5634974A (en) * 1995-11-03 1997-06-03 Micron Technologies, Inc. Method for forming hemispherical grained silicon
US6126847A (en) * 1997-11-24 2000-10-03 Micron Technology Inc. High selectivity etching process for oxides

Also Published As

Publication number Publication date
US6355182B2 (en) 2002-03-12
JP3464447B2 (ja) 2003-11-10
US6126847A (en) 2000-10-03
EP1034563B1 (de) 2010-09-15
DE69841902D1 (de) 2010-10-28
EP1034563A1 (de) 2000-09-13
WO1999027573A1 (en) 1999-06-03
JP3733024B2 (ja) 2006-01-11
JP2001524750A (ja) 2001-12-04
KR100458658B1 (ko) 2004-12-03
US6217784B1 (en) 2001-04-17
KR20010032412A (ko) 2001-04-16
US20010006167A1 (en) 2001-07-05
JP2001210617A (ja) 2001-08-03
AU1602299A (en) 1999-06-15

Similar Documents

Publication Publication Date Title
ATE481733T1 (de) Hochselektiver ätzprozess für oxide
EP0376252A3 (de) Verfahren zur Entfernung einer Oxidschicht auf einem Substrat
TW327700B (en) The method for using rough oxide mask to form isolating field oxide
KR960702675A (ko) Hf와 카르복실산 혼합물을 사용한 반도체 처리방법(method for semiconductor processing using mixtures of the and carboxylic acid)
KR920005267A (ko) 반도체장치의 제조방법
KR970030640A (ko) 반도체 장치의 소자 분리막 형성방법
KR950024017A (ko) 선택적 식각방법
TW374203B (en) A method for forming a fine contact hole in a semiconductor device
KR970008397A (ko) 식각용액 및 이를 이용한 반도체 장치의 식각방법
KR920003408A (ko) 반도체 기판의 제조 방법
KR970023814A (ko) 반도체 건식에칭방법
JPS55128830A (en) Method of working photoresist film
KR970072300A (ko) 반도체장치의 소자분리 방법
KR920020631A (ko) 반도체 장치의 다결정 실리콘층 식각방법
KR960005940A (ko) 소자분리 산화막 형성 방법
JPS56101744A (en) Manufacture of semiconductor device
KR970023812A (ko) 반도체 소자의 산화막 식각 방법
KR940009758A (ko) 산화막 건식 식각후 잔류물 제거방법
KR980005507A (ko) 반도체장치의 게이트 형성방법
KR970071128A (ko) 반도체 장치의 고전도성막 패턴형성방법
KR980005585A (ko) 반도체 소자의 금속층 형성방법
KR970023796A (ko) 건식 식각세정에 의한 화학 기계적 연마(cmp)의 오염 제거방법
KR970077232A (ko) 반도체 장치의 스몰콘택홀 형성방법
KR970030754A (ko) 반도체장치의 라벨 형성방법
KR940012059A (ko) 실리콘 산화막 건식식각 방법

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties