ATE484789T1 - Multiplikator - Google Patents

Multiplikator

Info

Publication number
ATE484789T1
ATE484789T1 AT06845803T AT06845803T ATE484789T1 AT E484789 T1 ATE484789 T1 AT E484789T1 AT 06845803 T AT06845803 T AT 06845803T AT 06845803 T AT06845803 T AT 06845803T AT E484789 T1 ATE484789 T1 AT E484789T1
Authority
AT
Austria
Prior art keywords
operand
multiplier
segments
multipliers
logic
Prior art date
Application number
AT06845803T
Other languages
English (en)
Inventor
Wajdi Feghali
William Hasenplaugh
Gilbert Wolrich
Daniel Cutter
Vinodh Gopal
Gunnar Gaubatz
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE484789T1 publication Critical patent/ATE484789T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products
    • G06F7/5275—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products using carry save adders

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Holo Graphy (AREA)
AT06845803T 2005-12-30 2006-12-18 Multiplikator ATE484789T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/323,994 US8073892B2 (en) 2005-12-30 2005-12-30 Cryptographic system, method and multiplier
PCT/US2006/048417 WO2007078939A2 (en) 2005-12-30 2006-12-18 Multiplier

Publications (1)

Publication Number Publication Date
ATE484789T1 true ATE484789T1 (de) 2010-10-15

Family

ID=38093399

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06845803T ATE484789T1 (de) 2005-12-30 2006-12-18 Multiplikator

Country Status (6)

Country Link
US (1) US8073892B2 (de)
EP (1) EP1966680B1 (de)
CN (2) CN101149675A (de)
AT (1) ATE484789T1 (de)
DE (1) DE602006017589D1 (de)
WO (1) WO2007078939A2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8073892B2 (en) 2005-12-30 2011-12-06 Intel Corporation Cryptographic system, method and multiplier
US9191211B2 (en) * 2009-02-27 2015-11-17 Atmel Corporation Data security system
US20100246815A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the kasumi cipher algorithm
US8654970B2 (en) * 2009-03-31 2014-02-18 Oracle America, Inc. Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm
US20100250965A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the advanced encryption standard (aes) algorithm
US9317286B2 (en) * 2009-03-31 2016-04-19 Oracle America, Inc. Apparatus and method for implementing instruction support for the camellia cipher algorithm
US8832464B2 (en) * 2009-03-31 2014-09-09 Oracle America, Inc. Processor and method for implementing instruction support for hash algorithms
US9990201B2 (en) 2009-12-22 2018-06-05 Intel Corporation Multiplication instruction for which execution completes without writing a carry flag
US8892459B2 (en) * 2011-07-25 2014-11-18 BrandVerity Inc. Affiliate investigation system and method
US9251377B2 (en) 2012-12-28 2016-02-02 Intel Corporation Instructions processors, methods, and systems to process secure hash algorithms
US8924741B2 (en) 2012-12-29 2014-12-30 Intel Corporation Instruction and logic to provide SIMD secure hashing round slice functionality
US9207941B2 (en) * 2013-03-15 2015-12-08 Intel Corporation Systems, apparatuses, and methods for reducing the number of short integer multiplications
US10038550B2 (en) 2013-08-08 2018-07-31 Intel Corporation Instruction and logic to provide a secure cipher hash round functionality
US10503510B2 (en) 2013-12-27 2019-12-10 Intel Corporation SM3 hash function message expansion processors, methods, systems, and instructions
US9912481B2 (en) 2014-03-27 2018-03-06 Intel Corporation Method and apparatus for efficiently executing hash operations
US9317719B2 (en) 2014-09-04 2016-04-19 Intel Corporation SM3 hash algorithm acceleration processors, methods, systems, and instructions
CN104239279A (zh) * 2014-09-10 2014-12-24 哈尔滨工业大学深圳研究生院 一种乘法器
US9658854B2 (en) 2014-09-26 2017-05-23 Intel Corporation Instructions and logic to provide SIMD SM3 cryptographic hashing functionality
GB2539881B (en) * 2015-06-24 2018-07-25 Advanced Risc Mach Ltd An apparatus and method for processing floating point values
CN107861709B (zh) * 2017-12-01 2021-04-02 中国兵器装备集团自动化研究所 适应前端高速处理的累加器和功率谱累加器及其累加方法
US10884957B2 (en) * 2018-10-15 2021-01-05 Intel Corporation Pipeline circuit architecture to provide in-memory computation functionality
US11599334B2 (en) * 2020-06-09 2023-03-07 VeriSilicon Microelectronics Enhanced multiply accumulate device for neural networks
US20220171604A1 (en) * 2020-12-02 2022-06-02 Flex Logix Technologies, Inc. Multiplier Circuit Array, MAC and MAC Pipeline including Same, and Methods of Configuring Same
WO2022191859A1 (en) * 2021-03-12 2022-09-15 Zeku, Inc. Vector processing using vector-specific data type
CN113946846B (zh) * 2021-10-14 2022-07-12 深圳致星科技有限公司 用于联邦学习和隐私计算的密文计算装置及方法
CN117149129B (zh) * 2023-10-31 2024-01-26 共模半导体技术(苏州)有限公司 专用大整数乘法微控制器
CN117850736B (zh) * 2024-03-06 2024-05-31 北京壁仞科技开发有限公司 乘法电路模块与乘法运算方法
CN118917387A (zh) * 2024-09-30 2024-11-08 国网北京市电力公司 联邦学习的加速方法、装置和非易失性存储介质

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3515344A (en) * 1966-08-31 1970-06-02 Ibm Apparatus for accumulating the sum of a plurality of operands
JPS57141753A (en) * 1981-02-25 1982-09-02 Nec Corp Multiplication circuit
JPS59113500A (ja) * 1982-12-20 1984-06-30 電子計算機基本技術研究組合 相関関数計算装置
US4594679A (en) * 1983-07-21 1986-06-10 International Business Machines Corporation High speed hardware multiplier for fixed floating point operands
JPS6284335A (ja) 1985-10-09 1987-04-17 Hitachi Ltd 乗算回路
CA2008774C (en) * 1989-01-30 1999-10-05 Hikaru Morita Modular multiplication method and the system for processing data
US5150322A (en) * 1990-06-05 1992-09-22 Vlsi Technology, Inc. Mixed-radix serial/parallel multipliers
JPH04216126A (ja) 1990-12-14 1992-08-06 Fujitsu Ltd 直並列型乗算器
DE69329260T2 (de) * 1992-06-25 2001-02-22 Canon K.K., Tokio/Tokyo Gerät zum Multiplizieren von Ganzzahlen mit vielen Ziffern
US6385634B1 (en) * 1995-08-31 2002-05-07 Intel Corporation Method for performing multiply-add operations on packed data
US5892699A (en) * 1997-09-16 1999-04-06 Integrated Device Technology, Inc. Method and apparatus for optimizing dependent operand flow within a multiplier using recoding logic
US6182233B1 (en) * 1998-11-20 2001-01-30 International Business Machines Corporation Interlocked pipelined CMOS
US6711602B1 (en) * 2000-02-18 2004-03-23 Texas Instruments Incorporated Data processor with flexible multiply unit
CN1220935C (zh) 2001-09-27 2005-09-28 中国科学院计算技术研究所 提高半规模双精度浮点乘法流水线效率的部件
US20030065699A1 (en) * 2001-10-01 2003-04-03 Koninklijke Philips Electronics N.V. Split multiplier for efficient mixed-precision DSP
US7139787B2 (en) * 2003-01-30 2006-11-21 Sun Microsystems, Inc. Multiply execution unit for performing integer and XOR multiplication
US7266580B2 (en) * 2003-05-12 2007-09-04 International Business Machines Corporation Modular binary multiplier for signed and unsigned operands of variable widths
US20050138366A1 (en) 2003-12-19 2005-06-23 Pan-Loong Loh IPSec acceleration using multiple micro engines
US7543142B2 (en) 2003-12-19 2009-06-02 Intel Corporation Method and apparatus for performing an authentication after cipher operation in a network processor
US7512945B2 (en) 2003-12-29 2009-03-31 Intel Corporation Method and apparatus for scheduling the processing of commands for execution by cryptographic algorithm cores in a programmable network processor
US7467175B2 (en) * 2003-12-29 2008-12-16 Xilinx, Inc. Programmable logic device with pipelined DSP slices
US20050149744A1 (en) 2003-12-29 2005-07-07 Intel Corporation Network processor having cryptographic processing including an authentication buffer
US7171604B2 (en) 2003-12-30 2007-01-30 Intel Corporation Method and apparatus for calculating cyclic redundancy check (CRC) on data using a programmable CRC engine
US7529924B2 (en) 2003-12-30 2009-05-05 Intel Corporation Method and apparatus for aligning ciphered data
KR20050088506A (ko) * 2004-03-02 2005-09-07 삼성전자주식회사 다중 세정도를 지원하는 확장형 몽고메리 모듈러 곱셈기
US7433469B2 (en) 2004-04-27 2008-10-07 Intel Corporation Apparatus and method for implementing the KASUMI ciphering process
US7653196B2 (en) 2004-04-27 2010-01-26 Intel Corporation Apparatus and method for performing RC4 ciphering
US7627764B2 (en) 2004-06-25 2009-12-01 Intel Corporation Apparatus and method for performing MD5 digesting
US7539718B2 (en) 2004-09-16 2009-05-26 Intel Corporation Method and apparatus for performing Montgomery multiplications
US20060059219A1 (en) 2004-09-16 2006-03-16 Koshy Kamal J Method and apparatus for performing modular exponentiations
FR2884005B1 (fr) * 2005-04-01 2007-06-01 Thales Sa Methode d'implementation de la multiplication modulaire de montgomery et son dispositif
US7720900B2 (en) * 2005-09-09 2010-05-18 International Business Machines Corporation Fused multiply add split for multiple precision arithmetic
US8073892B2 (en) 2005-12-30 2011-12-06 Intel Corporation Cryptographic system, method and multiplier

Also Published As

Publication number Publication date
CN101149675A (zh) 2008-03-26
CN101042639A (zh) 2007-09-26
DE602006017589D1 (de) 2010-11-25
EP1966680A2 (de) 2008-09-10
WO2007078939A3 (en) 2007-11-15
WO2007078939A2 (en) 2007-07-12
EP1966680B1 (de) 2010-10-13
US8073892B2 (en) 2011-12-06
US20110264720A1 (en) 2011-10-27

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