ATE491327T1 - Verfahren zur herstellung eines keramischen, mehrschichtsubstrats - Google Patents

Verfahren zur herstellung eines keramischen, mehrschichtsubstrats

Info

Publication number
ATE491327T1
ATE491327T1 AT07743047T AT07743047T ATE491327T1 AT E491327 T1 ATE491327 T1 AT E491327T1 AT 07743047 T AT07743047 T AT 07743047T AT 07743047 T AT07743047 T AT 07743047T AT E491327 T1 ATE491327 T1 AT E491327T1
Authority
AT
Austria
Prior art keywords
ceramic
conductive patterns
green
boundary
producing
Prior art date
Application number
AT07743047T
Other languages
English (en)
Inventor
Akiyoshi Kawamura
Takayuki Tsukizawa
Tetsuya Ikeda
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Application granted granted Critical
Publication of ATE491327T1 publication Critical patent/ATE491327T1/de

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0272Adaptations for fluid transport, e.g. channels, holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/0909Preformed cutting or breaking line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09163Slotted edge
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/16Two dimensionally sectional layer
    • Y10T428/163Next to unitary web or sheet of equal or greater extent
    • Y10T428/164Continuous two dimensionally sectional layer
    • Y10T428/166Glass, ceramic, or metal sections [e.g., floor or wall tile, etc.]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
  • Structure Of Printed Boards (AREA)
  • Laminated Bodies (AREA)
AT07743047T 2006-05-29 2007-05-09 Verfahren zur herstellung eines keramischen, mehrschichtsubstrats ATE491327T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006148246 2006-05-29
PCT/JP2007/059612 WO2007138826A1 (ja) 2006-05-29 2007-05-09 セラミック多層基板の製造方法

Publications (1)

Publication Number Publication Date
ATE491327T1 true ATE491327T1 (de) 2010-12-15

Family

ID=38778346

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07743047T ATE491327T1 (de) 2006-05-29 2007-05-09 Verfahren zur herstellung eines keramischen, mehrschichtsubstrats

Country Status (8)

Country Link
US (1) US8105453B2 (de)
EP (1) EP2023701B1 (de)
JP (1) JP4803185B2 (de)
KR (1) KR100989342B1 (de)
CN (1) CN101341808B (de)
AT (1) ATE491327T1 (de)
DE (1) DE602007011058D1 (de)
WO (1) WO2007138826A1 (de)

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* Cited by examiner, † Cited by third party
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DE602007011286D1 (de) * 2006-08-07 2011-01-27 Murata Manufacturing Co Verfahren zur herstellung eines keramischen, mehrschichtsubstrats
KR100887127B1 (ko) * 2007-11-23 2009-03-04 삼성전기주식회사 적층 세라믹 기판의 제조방법
JP4497247B2 (ja) * 2008-02-19 2010-07-07 株式会社村田製作所 積層型セラミック電子部品の製造方法
KR101018102B1 (ko) * 2008-08-25 2011-02-25 삼성전기주식회사 다층 ltcc 기판 및 그 제조방법
DE102008046336A1 (de) * 2008-09-09 2010-03-11 Osram Gesellschaft mit beschränkter Haftung LTCC-Schichtstapel
JP2010245088A (ja) * 2009-04-01 2010-10-28 Murata Mfg Co Ltd 積層型セラミック電子部品の製造方法
JP5673064B2 (ja) * 2010-12-15 2015-02-18 株式会社村田製作所 コイル内蔵基板の製造方法
CA2823578C (en) 2010-12-30 2016-09-20 Saint-Gobain Abrasives, Inc. Coated abrasive aggregates and products containing same
JP5921074B2 (ja) * 2011-03-17 2016-05-24 株式会社村田製作所 積層基板の製造方法
JP5945099B2 (ja) 2011-04-20 2016-07-05 日本特殊陶業株式会社 配線基板、多数個取り配線基板、およびその製造方法
KR20140075718A (ko) 2011-09-29 2014-06-19 생-고뱅 어브레이시브즈, 인코포레이티드 연마 제품 및 경질 표면 마무리 방법
WO2013057867A1 (ja) * 2011-10-21 2013-04-25 パナソニック株式会社 半導体装置
JP4999029B1 (ja) * 2011-11-11 2012-08-15 株式会社Maruwa 裁断焼結セラミックシート及びその製造方法
JP5682548B2 (ja) * 2011-12-14 2015-03-11 株式会社村田製作所 積層型インダクタ素子およびその製造方法
US9321947B2 (en) 2012-01-10 2016-04-26 Saint-Gobain Abrasives, Inc. Abrasive products and methods for finishing coated surfaces
WO2013138765A1 (en) 2012-03-16 2013-09-19 Saint-Gobain Abrasives, Inc. Abrasive products and methods for finishing surfaces
WO2013149197A1 (en) 2012-03-30 2013-10-03 Saint-Gobain Abrasives, Inc. Abrasive products and methods for fine polishing of ophthalmic lenses
TW201440983A (zh) * 2013-04-24 2014-11-01 蔚華科技股份有限公司 微型被動元件之製造方法
KR101490760B1 (ko) * 2013-07-04 2015-02-11 에스케이씨 주식회사 재단 적층 시트 및 그 제조방법
KR20150121567A (ko) 2014-04-21 2015-10-29 삼성전기주식회사 적층 세라믹 커패시터 및 그의 제조 방법
US9724897B2 (en) * 2015-01-07 2017-08-08 Emisense Technologies, Llc Processing method for constraining lower melting point metals within ceramic laminates during sintering
CN105098300A (zh) * 2015-09-11 2015-11-25 禾邦电子(中国)有限公司 共模滤波器及其制造方法
DE112017003656B4 (de) * 2016-07-21 2025-01-30 Ngk Insulators, Ltd. Herstellungsverfahren für Sensorelement
JP7180619B2 (ja) * 2020-01-10 2022-11-30 Tdk株式会社 電子部品及びその製造方法
TWI775280B (zh) * 2021-01-20 2022-08-21 力晶積成電子製造股份有限公司 電容集成結構、電容單元及其製造方法

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Also Published As

Publication number Publication date
US20080135155A1 (en) 2008-06-12
EP2023701A1 (de) 2009-02-11
KR20080033996A (ko) 2008-04-17
EP2023701B1 (de) 2010-12-08
CN101341808B (zh) 2010-06-23
WO2007138826A1 (ja) 2007-12-06
US8105453B2 (en) 2012-01-31
KR100989342B1 (ko) 2010-10-25
EP2023701A4 (de) 2009-05-20
JP4803185B2 (ja) 2011-10-26
CN101341808A (zh) 2009-01-07
JPWO2007138826A1 (ja) 2009-10-01
DE602007011058D1 (de) 2011-01-20

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