ATE498899T1 - Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates - Google Patents

Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates

Info

Publication number
ATE498899T1
ATE498899T1 AT02774890T AT02774890T ATE498899T1 AT E498899 T1 ATE498899 T1 AT E498899T1 AT 02774890 T AT02774890 T AT 02774890T AT 02774890 T AT02774890 T AT 02774890T AT E498899 T1 ATE498899 T1 AT E498899T1
Authority
AT
Austria
Prior art keywords
self
gate
effect transistor
aliginated
field effect
Prior art date
Application number
AT02774890T
Other languages
English (en)
Inventor
Simon Deleonibus
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Application granted granted Critical
Publication of ATE498899T1 publication Critical patent/ATE498899T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
AT02774890T 2001-09-03 2002-08-30 Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates ATE498899T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0111366A FR2829294B1 (fr) 2001-09-03 2001-09-03 Transistor a effet de champ a grilles auto-alignees horizontales et procede de fabrication d'un tel transistor
PCT/FR2002/002972 WO2003021633A1 (fr) 2001-09-03 2002-08-30 Transistor a effet de champ a grilles auto-alignees horizontales et procede de fabrication d'un tel transistor

Publications (1)

Publication Number Publication Date
ATE498899T1 true ATE498899T1 (de) 2011-03-15

Family

ID=8866904

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02774890T ATE498899T1 (de) 2001-09-03 2002-08-30 Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates

Country Status (6)

Country Link
US (1) US7022562B2 (de)
EP (1) EP1428247B1 (de)
AT (1) ATE498899T1 (de)
DE (1) DE60239209D1 (de)
FR (1) FR2829294B1 (de)
WO (1) WO2003021633A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6946696B2 (en) * 2002-12-23 2005-09-20 International Business Machines Corporation Self-aligned isolation double-gate FET
US7491644B2 (en) * 2004-09-10 2009-02-17 Commissariat A L'energie Atomique Manufacturing process for a transistor made of thin layers
WO2006032538A1 (en) 2004-09-23 2006-03-30 Bayer Cropscience Gmbh Methods and means for producing hyaluronan
US7341915B2 (en) * 2005-05-31 2008-03-11 Freescale Semiconductor, Inc. Method of making planar double gate silicon-on-insulator structures
US7563681B2 (en) * 2006-01-27 2009-07-21 Freescale Semiconductor, Inc. Double-gated non-volatile memory and methods for forming thereof
FR2899381B1 (fr) 2006-03-28 2008-07-18 Commissariat Energie Atomique Procede de realisation d'un transistor a effet de champ a grilles auto-alignees
FR2911004B1 (fr) * 2006-12-28 2009-05-15 Commissariat Energie Atomique Procede de realisation de transistors a double-grille asymetriques permettant la realisation de transistors a double-grille asymetriques et symetriques sur un meme substrat
FR2913526B1 (fr) * 2007-03-09 2009-05-29 Commissariat Energie Atomique Procede de fabrication d'un transistor a effet de champ a grilles auto-alignees
US8455268B2 (en) * 2007-08-31 2013-06-04 Spansion Llc Gate replacement with top oxide regrowth for the top oxide improvement
FR2932609B1 (fr) * 2008-06-11 2010-12-24 Commissariat Energie Atomique Transistor soi avec plan de masse et grille auto-alignes et oxyde enterre d'epaisseur variable
US9136111B1 (en) * 2011-07-01 2015-09-15 Bae Systems Information And Electronic Systems Integration Inc. Field effect transistors with gate electrodes having Ni and Ti metal layers
US9490340B2 (en) 2014-06-18 2016-11-08 Globalfoundries Inc. Methods of forming nanowire devices with doped extension regions and the resulting devices
US9431512B2 (en) * 2014-06-18 2016-08-30 Globalfoundries Inc. Methods of forming nanowire devices with spacers and the resulting devices

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5168072A (en) * 1990-10-12 1992-12-01 Texas Instruments Incorporated Method of fabricating an high-performance insulated-gate field-effect transistor
US5273921A (en) * 1991-12-27 1993-12-28 Purdue Research Foundation Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor
JP3460863B2 (ja) * 1993-09-17 2003-10-27 三菱電機株式会社 半導体装置の製造方法
US5773331A (en) * 1996-12-17 1998-06-30 International Business Machines Corporation Method for making single and double gate field effect transistors with sidewall source-drain contacts
US6380039B2 (en) * 1998-05-06 2002-04-30 Interuniversitair Microelektronica Centrum (Imec Vzw) Method for forming a FET having L-shaped insulating spacers
KR100279264B1 (ko) * 1998-12-26 2001-02-01 김영환 더블 게이트 구조를 갖는 에스·오·아이 트랜지스터 및 그의제조방법
DE10052131C2 (de) * 2000-10-20 2003-02-13 Advanced Micro Devices Inc Verfahren zur Herstellung von Feldeffekttransistoren mit einer vollständig selbstjustierenden Technologie

Also Published As

Publication number Publication date
FR2829294B1 (fr) 2004-10-15
US20040197977A1 (en) 2004-10-07
FR2829294A1 (fr) 2003-03-07
EP1428247A1 (de) 2004-06-16
EP1428247B1 (de) 2011-02-16
DE60239209D1 (de) 2011-03-31
US7022562B2 (en) 2006-04-04
WO2003021633A1 (fr) 2003-03-13

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