ATE507483T1 - Verfahren und vorrichtung zur digitalen phasenmessung eines signals - Google Patents

Verfahren und vorrichtung zur digitalen phasenmessung eines signals

Info

Publication number
ATE507483T1
ATE507483T1 AT04292278T AT04292278T ATE507483T1 AT E507483 T1 ATE507483 T1 AT E507483T1 AT 04292278 T AT04292278 T AT 04292278T AT 04292278 T AT04292278 T AT 04292278T AT E507483 T1 ATE507483 T1 AT E507483T1
Authority
AT
Austria
Prior art keywords
frequency
counter
sampling
sample sequence
data signal
Prior art date
Application number
AT04292278T
Other languages
English (en)
Inventor
Maurizio Skerlj
Luca Razzetti
Stefano Gastaldello
Original Assignee
Alcatel Lucent
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Lucent filed Critical Alcatel Lucent
Application granted granted Critical
Publication of ATE507483T1 publication Critical patent/ATE507483T1/de

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
    • G01R25/08Arrangements for measuring phase angle between a voltage and a current or between voltages or currents by counting of standard pulses
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
    • G01R25/005Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller, or for passing one of the input signals as output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/16Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605Fixed allocated frame structures
    • H04J3/1611Synchronous digital hierarchy [SDH] or SONET
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Measuring Phase Differences (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT04292278T 2004-09-22 2004-09-22 Verfahren und vorrichtung zur digitalen phasenmessung eines signals ATE507483T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04292278A EP1640733B1 (de) 2004-09-22 2004-09-22 Verfahren und Vorrichtung zur digitalen Phasenmessung eines Signals

Publications (1)

Publication Number Publication Date
ATE507483T1 true ATE507483T1 (de) 2011-05-15

Family

ID=34931406

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04292278T ATE507483T1 (de) 2004-09-22 2004-09-22 Verfahren und vorrichtung zur digitalen phasenmessung eines signals

Country Status (5)

Country Link
US (1) US20060061393A1 (de)
EP (1) EP1640733B1 (de)
CN (1) CN1753311A (de)
AT (1) ATE507483T1 (de)
DE (1) DE602004032438D1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2282229A1 (de) * 2009-08-07 2011-02-09 CCS Technology, Inc. Mit Steckern versehene optische Anordnung und Verfahren zum Anschluss von optischen Sende-Empfangseinheiten über die optische Anordnung
US8890507B2 (en) * 2010-05-19 2014-11-18 Tektronix, Inc. Phase transient response measurements using automatic frequency estimation

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5084669A (en) * 1990-03-08 1992-01-28 Telefonaktiebolaget L M Ericsson Direct phase digitization
US5373255A (en) * 1993-07-28 1994-12-13 Motorola, Inc. Low-power, jitter-compensated phase locked loop and method therefor
DE4336240A1 (de) * 1993-10-23 1995-04-27 Sel Alcatel Ag Schaltungsanordnung für einen digitalen Phasenkomparator
US6266799B1 (en) * 1997-10-02 2001-07-24 Xaqti, Corporation Multi-phase data/clock recovery circuitry and methods for implementing same
US6246738B1 (en) * 1998-11-19 2001-06-12 Pmc-Sierra Ltd. Phase modulated reduction of clock wander in synchronous wide area networks

Also Published As

Publication number Publication date
CN1753311A (zh) 2006-03-29
DE602004032438D1 (de) 2011-06-09
US20060061393A1 (en) 2006-03-23
EP1640733A1 (de) 2006-03-29
EP1640733B1 (de) 2011-04-27

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Legal Events

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