ATE507483T1 - Verfahren und vorrichtung zur digitalen phasenmessung eines signals - Google Patents
Verfahren und vorrichtung zur digitalen phasenmessung eines signalsInfo
- Publication number
- ATE507483T1 ATE507483T1 AT04292278T AT04292278T ATE507483T1 AT E507483 T1 ATE507483 T1 AT E507483T1 AT 04292278 T AT04292278 T AT 04292278T AT 04292278 T AT04292278 T AT 04292278T AT E507483 T1 ATE507483 T1 AT E507483T1
- Authority
- AT
- Austria
- Prior art keywords
- frequency
- counter
- sampling
- sample sequence
- data signal
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 5
- 238000005259 measurement Methods 0.000 title 1
- 238000005070 sampling Methods 0.000 abstract 4
- 230000005540 biological transmission Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
- G01R25/08—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents by counting of standard pulses
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
- G01R25/005—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller, or for passing one of the input signals as output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Measuring Phase Differences (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP04292278A EP1640733B1 (de) | 2004-09-22 | 2004-09-22 | Verfahren und Vorrichtung zur digitalen Phasenmessung eines Signals |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE507483T1 true ATE507483T1 (de) | 2011-05-15 |
Family
ID=34931406
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT04292278T ATE507483T1 (de) | 2004-09-22 | 2004-09-22 | Verfahren und vorrichtung zur digitalen phasenmessung eines signals |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20060061393A1 (de) |
| EP (1) | EP1640733B1 (de) |
| CN (1) | CN1753311A (de) |
| AT (1) | ATE507483T1 (de) |
| DE (1) | DE602004032438D1 (de) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2282229A1 (de) * | 2009-08-07 | 2011-02-09 | CCS Technology, Inc. | Mit Steckern versehene optische Anordnung und Verfahren zum Anschluss von optischen Sende-Empfangseinheiten über die optische Anordnung |
| US8890507B2 (en) * | 2010-05-19 | 2014-11-18 | Tektronix, Inc. | Phase transient response measurements using automatic frequency estimation |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5084669A (en) * | 1990-03-08 | 1992-01-28 | Telefonaktiebolaget L M Ericsson | Direct phase digitization |
| US5373255A (en) * | 1993-07-28 | 1994-12-13 | Motorola, Inc. | Low-power, jitter-compensated phase locked loop and method therefor |
| DE4336240A1 (de) * | 1993-10-23 | 1995-04-27 | Sel Alcatel Ag | Schaltungsanordnung für einen digitalen Phasenkomparator |
| US6266799B1 (en) * | 1997-10-02 | 2001-07-24 | Xaqti, Corporation | Multi-phase data/clock recovery circuitry and methods for implementing same |
| US6246738B1 (en) * | 1998-11-19 | 2001-06-12 | Pmc-Sierra Ltd. | Phase modulated reduction of clock wander in synchronous wide area networks |
-
2004
- 2004-09-22 AT AT04292278T patent/ATE507483T1/de not_active IP Right Cessation
- 2004-09-22 DE DE602004032438T patent/DE602004032438D1/de not_active Expired - Lifetime
- 2004-09-22 EP EP04292278A patent/EP1640733B1/de not_active Expired - Lifetime
-
2005
- 2005-07-29 US US11/192,357 patent/US20060061393A1/en not_active Abandoned
- 2005-09-21 CN CN200510103568.7A patent/CN1753311A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN1753311A (zh) | 2006-03-29 |
| DE602004032438D1 (de) | 2011-06-09 |
| US20060061393A1 (en) | 2006-03-23 |
| EP1640733A1 (de) | 2006-03-29 |
| EP1640733B1 (de) | 2011-04-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |