ATE513275T1 - Produkt-summen-operations-schaltung und verfahren - Google Patents

Produkt-summen-operations-schaltung und verfahren

Info

Publication number
ATE513275T1
ATE513275T1 AT04792704T AT04792704T ATE513275T1 AT E513275 T1 ATE513275 T1 AT E513275T1 AT 04792704 T AT04792704 T AT 04792704T AT 04792704 T AT04792704 T AT 04792704T AT E513275 T1 ATE513275 T1 AT E513275T1
Authority
AT
Austria
Prior art keywords
product sum
sum operations
operations circuit
sorting block
product
Prior art date
Application number
AT04792704T
Other languages
English (en)
Inventor
Osamu Nomura
Takashi Morie
Keisuke Korekado
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Kk filed Critical Canon Kk
Application granted granted Critical
Publication of ATE513275T1 publication Critical patent/ATE513275T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Biomedical Technology (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Computational Mathematics (AREA)
  • Biophysics (AREA)
  • Artificial Intelligence (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Neurology (AREA)
  • Computer Hardware Design (AREA)
  • Complex Calculations (AREA)
  • Logic Circuits (AREA)
AT04792704T 2003-10-16 2004-10-14 Produkt-summen-operations-schaltung und verfahren ATE513275T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003356625A JP4620943B2 (ja) 2003-10-16 2003-10-16 積和演算回路及びその方法
PCT/JP2004/015554 WO2005038704A2 (en) 2003-10-16 2004-10-14 Product-sum operation circuit and method

Publications (1)

Publication Number Publication Date
ATE513275T1 true ATE513275T1 (de) 2011-07-15

Family

ID=34463218

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04792704T ATE513275T1 (de) 2003-10-16 2004-10-14 Produkt-summen-operations-schaltung und verfahren

Country Status (7)

Country Link
US (1) US7747668B2 (de)
EP (1) EP1676225B1 (de)
JP (1) JP4620943B2 (de)
KR (1) KR100875937B1 (de)
CN (1) CN1998012B (de)
AT (1) ATE513275T1 (de)
WO (1) WO2005038704A2 (de)

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ATE542176T1 (de) * 2003-10-16 2012-02-15 Canon Kk Betriebsschaltung und betriebssteuerverfahren dafür
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JP5160304B2 (ja) * 2008-05-22 2013-03-13 シャープ株式会社 抵抗変化型可変抵抗素子を備えた積演算装置、及び積和演算装置、これらの装置を各ニューロン素子に備えるニューラルネットワーク、並びに積演算方法
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JP6556768B2 (ja) * 2017-01-25 2019-08-07 株式会社東芝 積和演算器、ネットワークユニットおよびネットワーク装置
US20190005035A1 (en) * 2017-05-31 2019-01-03 Semiconductor Energy Laboratory Co., Ltd. Information search system, intellectual property information search system, information search method, and intellectual property information search method
CN109583577B (zh) * 2017-09-29 2021-04-23 上海寒武纪信息科技有限公司 运算装置及方法
CN109753268B (zh) * 2017-11-08 2021-02-02 北京思朗科技有限责任公司 多粒度并行运算乘法器
US10777566B2 (en) 2017-11-10 2020-09-15 Macronix International Co., Ltd. 3D array arranged for memory and in-memory sum-of-products operations
US10957392B2 (en) 2018-01-17 2021-03-23 Macronix International Co., Ltd. 2D and 3D sum-of-products array for neuromorphic computing system
US10719296B2 (en) 2018-01-17 2020-07-21 Macronix International Co., Ltd. Sum-of-products accelerator array
US10635398B2 (en) * 2018-03-15 2020-04-28 Macronix International Co., Ltd. Voltage sensing type of matrix multiplication method for neuromorphic computing system
JP2020009123A (ja) 2018-07-06 2020-01-16 ソニー株式会社 積和演算装置、積和演算回路及び積和演算方法
US11138497B2 (en) 2018-07-17 2021-10-05 Macronix International Co., Ltd In-memory computing devices for neural networks
US11636325B2 (en) 2018-10-24 2023-04-25 Macronix International Co., Ltd. In-memory data pooling for machine learning
US11562229B2 (en) 2018-11-30 2023-01-24 Macronix International Co., Ltd. Convolution accelerator using in-memory computation
US10672469B1 (en) 2018-11-30 2020-06-02 Macronix International Co., Ltd. In-memory convolution for machine learning
KR102243837B1 (ko) * 2018-12-04 2021-04-23 한국과학기술원 기계 학습 연산을 처리하는 아날로그 회로, 이를 포함하는 학습 장치 및 이를 이용한 기계 학습 연산 방법
US11934480B2 (en) 2018-12-18 2024-03-19 Macronix International Co., Ltd. NAND block architecture for in-memory multiply-and-accumulate operations
JP2020126427A (ja) * 2019-02-04 2020-08-20 ソニー株式会社 演算装置、積和演算システム及び設定方法
US11119674B2 (en) 2019-02-19 2021-09-14 Macronix International Co., Ltd. Memory devices and methods for operating the same
US10783963B1 (en) 2019-03-08 2020-09-22 Macronix International Co., Ltd. In-memory computation device with inter-page and intra-page data circuits
US11132176B2 (en) 2019-03-20 2021-09-28 Macronix International Co., Ltd. Non-volatile computing method in flash memory
US10910393B2 (en) 2019-04-25 2021-02-02 Macronix International Co., Ltd. 3D NOR memory having vertical source and drain structures
US12353503B2 (en) 2019-05-02 2025-07-08 Silicon Storage Technology, Inc. Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural network
WO2020234681A1 (ja) * 2019-05-17 2020-11-26 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
US11573792B2 (en) * 2019-09-03 2023-02-07 Samsung Electronics Co., Ltd. Method and computing device with a multiplier-accumulator circuit
US11507816B2 (en) * 2019-09-19 2022-11-22 Silicon Storage Technology, Inc. Precision tuning for the programming of analog neural memory in a deep learning artificial neural network
TWI761147B (zh) * 2020-04-17 2022-04-11 神盾股份有限公司 乘積和計算電路及其乘積和計算方法
US11737274B2 (en) 2021-02-08 2023-08-22 Macronix International Co., Ltd. Curved channel 3D memory device
TWI783854B (zh) * 2021-03-17 2022-11-11 神盾股份有限公司 乘積和運算裝置
US11916011B2 (en) 2021-04-14 2024-02-27 Macronix International Co., Ltd. 3D virtual ground memory and manufacturing methods for same
US20220398067A1 (en) * 2021-06-10 2022-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multiply-accumlate device
US11710519B2 (en) 2021-07-06 2023-07-25 Macronix International Co., Ltd. High density memory with reference memory using grouped cells and corresponding operations
US12299597B2 (en) 2021-08-27 2025-05-13 Macronix International Co., Ltd. Reconfigurable AI system
US12321603B2 (en) 2023-02-22 2025-06-03 Macronix International Co., Ltd. High bandwidth non-volatile memory for AI inference system
US12536404B2 (en) 2023-02-22 2026-01-27 Macronix International Co., Ltd. Data optimization for high bandwidth (HBW) NVM AI inference system
US12585931B2 (en) 2023-05-04 2026-03-24 Macronix International Co., Ltd. 3D hybrid bonding 3D memory devices with NPU/CPU for AI inference application
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ATE542176T1 (de) 2003-10-16 2012-02-15 Canon Kk Betriebsschaltung und betriebssteuerverfahren dafür

Also Published As

Publication number Publication date
JP2005122465A (ja) 2005-05-12
EP1676225B1 (de) 2011-06-15
CN1998012A (zh) 2007-07-11
KR100875937B1 (ko) 2008-12-26
US7747668B2 (en) 2010-06-29
WO2005038704A2 (en) 2005-04-28
EP1676225A2 (de) 2006-07-05
JP4620943B2 (ja) 2011-01-26
WO2005038704A3 (en) 2006-08-31
KR20060083429A (ko) 2006-07-20
CN1998012B (zh) 2010-11-10
US20050138100A1 (en) 2005-06-23

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