ATE515734T1 - Steuerung von prefetch befehlen erweitet um die spezifikation der verwendungdauer der daten - Google Patents

Steuerung von prefetch befehlen erweitet um die spezifikation der verwendungdauer der daten

Info

Publication number
ATE515734T1
ATE515734T1 AT04728933T AT04728933T ATE515734T1 AT E515734 T1 ATE515734 T1 AT E515734T1 AT 04728933 T AT04728933 T AT 04728933T AT 04728933 T AT04728933 T AT 04728933T AT E515734 T1 ATE515734 T1 AT E515734T1
Authority
AT
Austria
Prior art keywords
protocol
command
issuance
cost
prefetch command
Prior art date
Application number
AT04728933T
Other languages
English (en)
Inventor
Akio Ohba
Original Assignee
Sony Computer Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Computer Entertainment Inc filed Critical Sony Computer Entertainment Inc
Application granted granted Critical
Publication of ATE515734T1 publication Critical patent/ATE515734T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
AT04728933T 2003-05-14 2004-04-22 Steuerung von prefetch befehlen erweitet um die spezifikation der verwendungdauer der daten ATE515734T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003136387A JP3973597B2 (ja) 2003-05-14 2003-05-14 プリフェッチ命令制御方法、プリフェッチ命令制御装置、キャッシュメモリ制御装置、オブジェクトコードの生成方法および装置
PCT/JP2004/005777 WO2004102392A2 (en) 2003-05-14 2004-04-22 Control of prefetch command for data extended with specification of the utilization time of the data

Publications (1)

Publication Number Publication Date
ATE515734T1 true ATE515734T1 (de) 2011-07-15

Family

ID=33410741

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04728933T ATE515734T1 (de) 2003-05-14 2004-04-22 Steuerung von prefetch befehlen erweitet um die spezifikation der verwendungdauer der daten

Country Status (8)

Country Link
US (2) US7451276B2 (de)
EP (1) EP1623327B1 (de)
JP (1) JP3973597B2 (de)
KR (1) KR100752005B1 (de)
CN (1) CN1849580B (de)
AT (1) ATE515734T1 (de)
TW (1) TW200513851A (de)
WO (1) WO2004102392A2 (de)

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Also Published As

Publication number Publication date
US7716426B2 (en) 2010-05-11
TW200513851A (en) 2005-04-16
KR20060013384A (ko) 2006-02-09
CN1849580A (zh) 2006-10-18
US20070130428A1 (en) 2007-06-07
US7451276B2 (en) 2008-11-11
EP1623327A2 (de) 2006-02-08
US20040230748A1 (en) 2004-11-18
CN1849580B (zh) 2010-04-28
EP1623327B1 (de) 2011-07-06
JP2004348175A (ja) 2004-12-09
WO2004102392A2 (en) 2004-11-25
JP3973597B2 (ja) 2007-09-12
KR100752005B1 (ko) 2007-08-28
WO2004102392A3 (en) 2006-03-23

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