ATE519223T1 - Verfahren zur herstellung mehrerer halbleiteranordnungen und trägersubstrat - Google Patents

Verfahren zur herstellung mehrerer halbleiteranordnungen und trägersubstrat

Info

Publication number
ATE519223T1
ATE519223T1 AT06821316T AT06821316T ATE519223T1 AT E519223 T1 ATE519223 T1 AT E519223T1 AT 06821316 T AT06821316 T AT 06821316T AT 06821316 T AT06821316 T AT 06821316T AT E519223 T1 ATE519223 T1 AT E519223T1
Authority
AT
Austria
Prior art keywords
carrier substrate
several semiconductor
producing several
semiconductor arrangements
layer
Prior art date
Application number
AT06821316T
Other languages
English (en)
Inventor
Ronald Dekker
Greja Verheijden
Theodorus Michielsen
Der Poel Carolus Van
Cornelis Mutsaers
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE519223T1 publication Critical patent/ATE519223T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.

Landscapes

  • Thin Film Transistor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
AT06821316T 2005-11-11 2006-11-03 Verfahren zur herstellung mehrerer halbleiteranordnungen und trägersubstrat ATE519223T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05110650 2005-11-11
PCT/IB2006/054093 WO2007054869A1 (en) 2005-11-11 2006-11-03 Method of manufacturing a plurality of semiconductor devices and carrier substrate

Publications (1)

Publication Number Publication Date
ATE519223T1 true ATE519223T1 (de) 2011-08-15

Family

ID=37808268

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06821316T ATE519223T1 (de) 2005-11-11 2006-11-03 Verfahren zur herstellung mehrerer halbleiteranordnungen und trägersubstrat

Country Status (7)

Country Link
US (1) US7736948B2 (de)
EP (1) EP1949433B1 (de)
JP (1) JP5091150B2 (de)
CN (1) CN101305456B (de)
AT (1) ATE519223T1 (de)
TW (1) TW200725801A (de)
WO (1) WO2007054869A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US7402897B2 (en) * 2002-08-08 2008-07-22 Elm Technology Corporation Vertical system integration
EP2269230A4 (de) 2008-03-08 2016-03-30 Crystal Solar Inc Integriertes verfahren und system zur herstellung von monolithischen panels aus kristallinen solarzellen
US8481357B2 (en) * 2008-03-08 2013-07-09 Crystal Solar Incorporated Thin film solar cell with ceramic handling layer
TWI419091B (zh) * 2009-02-10 2013-12-11 財團法人工業技術研究院 可轉移的可撓式電子裝置結構及可撓式電子裝置的製造方法
US8507322B2 (en) * 2010-06-24 2013-08-13 Akihiro Chida Semiconductor substrate and method for manufacturing semiconductor device
DE102011086689B4 (de) * 2011-11-21 2017-02-16 Osram Oled Gmbh Verfahren zum Herstellen eines opto-elektronischen Bauelements
KR102046534B1 (ko) 2013-01-25 2019-11-19 삼성전자주식회사 기판 가공 방법
US10134803B2 (en) * 2015-01-23 2018-11-20 Vuereal Inc. Micro device integration into system substrate
US10700120B2 (en) 2015-01-23 2020-06-30 Vuereal Inc. Micro device integration into system substrate
US12402466B2 (en) 2015-01-23 2025-08-26 Vuereal Inc. Micro device integration into system substrate
CN107851586B (zh) 2015-01-23 2021-07-06 维耶尔公司 到受体衬底的选择性微型器件转移
US20170215280A1 (en) 2016-01-21 2017-07-27 Vuereal Inc. Selective transfer of micro devices
DE102019126862A1 (de) * 2019-10-07 2021-04-08 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Bauelementverbund, Verfahren zum Ablösen von Bauelementen aus einem Bauelementverbund und Verfahren zur Herstellung eines Bauelementverbunds
DE102020211360A1 (de) 2020-09-10 2022-03-10 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zum Bereitstellen eines Schichtelementes in einer Schichtanordnung
CN114148987B (zh) * 2021-11-08 2024-12-20 歌尔微电子股份有限公司 微机电系统装置的制造方法、微机电系统装置和电子设备

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258325A (en) * 1990-12-31 1993-11-02 Kopin Corporation Method for manufacturing a semiconductor device using a circuit transfer film
US6027958A (en) * 1996-07-11 2000-02-22 Kopin Corporation Transferred flexible integrated circuit
EP1351308B1 (de) * 1996-08-27 2009-04-22 Seiko Epson Corporation Ablösungsverfahren und Verfahren zum Übertragen eines Dünnfilm-Bauelements
US6479890B1 (en) * 1998-01-22 2002-11-12 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Semiconductor microsystem embedded in flexible foil
JP4230543B2 (ja) * 1998-03-16 2009-02-25 エヌエックスピー ビー ヴィ 「チップサイズパッケージ」を有する半導体装置の製造方法
WO1999065074A2 (en) * 1998-06-10 1999-12-16 Koninklijke Philips Electronics N.V. Semiconductor device comprising an integrated circuit provided with a ceramic security coating and method of manufacturing such a device
DE10122324A1 (de) * 2001-05-08 2002-11-14 Philips Corp Intellectual Pty Flexible integrierte monolithische Schaltung
AU2003205104A1 (en) * 2002-01-11 2003-07-30 The Pennsylvania State University Method of forming a removable support with a sacrificial layers and of transferring devices
JP3812500B2 (ja) * 2002-06-20 2006-08-23 セイコーエプソン株式会社 半導体装置とその製造方法、電気光学装置、電子機器
US6946178B2 (en) * 2003-05-23 2005-09-20 James Sheats Lamination and delamination technique for thin film processing
JP4912586B2 (ja) * 2003-12-19 2012-04-11 株式会社半導体エネルギー研究所 薄膜集積回路装置の作製方法
US7271076B2 (en) * 2003-12-19 2007-09-18 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device
WO2005091370A1 (en) 2004-03-22 2005-09-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing integrated circuit

Also Published As

Publication number Publication date
US20080315440A1 (en) 2008-12-25
JP2009516368A (ja) 2009-04-16
CN101305456A (zh) 2008-11-12
US7736948B2 (en) 2010-06-15
JP5091150B2 (ja) 2012-12-05
TW200725801A (en) 2007-07-01
CN101305456B (zh) 2011-01-12
WO2007054869A1 (en) 2007-05-18
EP1949433A1 (de) 2008-07-30
EP1949433B1 (de) 2011-08-03

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