ATE520086T1 - Speicheranordnung für mehrprozessorsysteme - Google Patents

Speicheranordnung für mehrprozessorsysteme

Info

Publication number
ATE520086T1
ATE520086T1 AT06762309T AT06762309T ATE520086T1 AT E520086 T1 ATE520086 T1 AT E520086T1 AT 06762309 T AT06762309 T AT 06762309T AT 06762309 T AT06762309 T AT 06762309T AT E520086 T1 ATE520086 T1 AT E520086T1
Authority
AT
Austria
Prior art keywords
memory
queue
functional unit
queues
arrangement
Prior art date
Application number
AT06762309T
Other languages
English (en)
Inventor
Bingfeng Mei
Suk Kim
Osman Allam
Original Assignee
Imec
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imec, Samsung Electronics Co Ltd filed Critical Imec
Application granted granted Critical
Publication of ATE520086T1 publication Critical patent/ATE520086T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1657—Access to multiple memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0851—Cache with interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
AT06762309T 2005-06-30 2006-06-30 Speicheranordnung für mehrprozessorsysteme ATE520086T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69550605P 2005-06-30 2005-06-30
PCT/EP2006/006375 WO2007003370A2 (en) 2005-06-30 2006-06-30 A memory arrangement for multi-processor systems

Publications (1)

Publication Number Publication Date
ATE520086T1 true ATE520086T1 (de) 2011-08-15

Family

ID=37106271

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06762309T ATE520086T1 (de) 2005-06-30 2006-06-30 Speicheranordnung für mehrprozessorsysteme

Country Status (6)

Country Link
US (1) US8560795B2 (de)
EP (2) EP1896983B1 (de)
JP (1) JP5117383B2 (de)
KR (1) KR100990902B1 (de)
AT (1) ATE520086T1 (de)
WO (1) WO2007003370A2 (de)

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Also Published As

Publication number Publication date
JP2008545187A (ja) 2008-12-11
EP2317446A1 (de) 2011-05-04
US20080140980A1 (en) 2008-06-12
KR20080025053A (ko) 2008-03-19
EP1896983B1 (de) 2011-08-10
KR100990902B1 (ko) 2010-11-01
WO2007003370A2 (en) 2007-01-11
EP1896983A2 (de) 2008-03-12
JP5117383B2 (ja) 2013-01-16
US8560795B2 (en) 2013-10-15
WO2007003370A3 (en) 2007-04-05

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