ATE526680T1 - Prozess zur herstellung eines feldeffekttransistors mit isoliertem gate mit selbstausgerichtetem abgelagertem source-/ drainbereich - Google Patents
Prozess zur herstellung eines feldeffekttransistors mit isoliertem gate mit selbstausgerichtetem abgelagertem source-/ drainbereichInfo
- Publication number
- ATE526680T1 ATE526680T1 AT05790815T AT05790815T ATE526680T1 AT E526680 T1 ATE526680 T1 AT E526680T1 AT 05790815 T AT05790815 T AT 05790815T AT 05790815 T AT05790815 T AT 05790815T AT E526680 T1 ATE526680 T1 AT E526680T1
- Authority
- AT
- Austria
- Prior art keywords
- source
- drain
- insulated gate
- recess
- making
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6219—Fin field-effect transistors [FinFET] characterised by the source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/165—Tunnel injectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/018—Spacers formed inside holes at the prospective gate locations, e.g. holes left by removing dummy gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01316—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of elemental metal contacting the insulator, e.g. Ta, W, Mo or Al
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60486804P | 2004-08-26 | 2004-08-26 | |
| US11/166,286 US7902029B2 (en) | 2002-08-12 | 2005-06-23 | Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor |
| PCT/US2005/030209 WO2006026339A2 (en) | 2004-08-26 | 2005-08-24 | Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE526680T1 true ATE526680T1 (de) | 2011-10-15 |
Family
ID=35519844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05790815T ATE526680T1 (de) | 2004-08-26 | 2005-08-24 | Prozess zur herstellung eines feldeffekttransistors mit isoliertem gate mit selbstausgerichtetem abgelagertem source-/ drainbereich |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7902029B2 (de) |
| EP (1) | EP1787320B1 (de) |
| AT (1) | ATE526680T1 (de) |
| WO (1) | WO2006026339A2 (de) |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7504328B2 (en) * | 2004-05-11 | 2009-03-17 | National University Of Singapore | Schottky barrier source/drain n-mosfet using ytterbium silicide |
| US7598134B2 (en) | 2004-07-28 | 2009-10-06 | Micron Technology, Inc. | Memory device forming methods |
| US7250666B2 (en) | 2005-11-15 | 2007-07-31 | International Business Machines Corporation | Schottky barrier diode and method of forming a Schottky barrier diode |
| US7525160B2 (en) * | 2005-12-27 | 2009-04-28 | Intel Corporation | Multigate device with recessed strain regions |
| WO2007101120A1 (en) * | 2006-02-23 | 2007-09-07 | Acorn Technologies, Inc. | Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source (s) and/or drain (s) |
| US8435873B2 (en) | 2006-06-08 | 2013-05-07 | Texas Instruments Incorporated | Unguarded Schottky barrier diodes with dielectric underetch at silicide interface |
| KR100817417B1 (ko) * | 2006-12-26 | 2008-03-27 | 동부일렉트로닉스 주식회사 | 고전압 씨모스 소자 및 그 제조 방법 |
| US7435636B1 (en) | 2007-03-29 | 2008-10-14 | Micron Technology, Inc. | Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods |
| JP2009059996A (ja) * | 2007-09-03 | 2009-03-19 | Univ Of Tokyo | 半導体装置及びその製造方法 |
| US8263466B2 (en) * | 2007-10-17 | 2012-09-11 | Acorn Technologies, Inc. | Channel strain induced by strained metal in FET source or drain |
| US20090101972A1 (en) * | 2007-10-17 | 2009-04-23 | Gaines R Stockton | Process for fabricating a field-effect transistor with doping segregation used in source and/or drain |
| KR100954909B1 (ko) * | 2007-12-26 | 2010-04-27 | 주식회사 동부하이텍 | Mim 커패시터 및 mim 커패시터 제조 방법 |
| DE102008059500B4 (de) * | 2008-11-28 | 2010-08-26 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines Mehr-Gatetransistors mit homogen silizidierten Stegendbereichen |
| US8487367B2 (en) | 2009-12-01 | 2013-07-16 | Rambus Inc. | Planar MOSFET with textured channel and gate |
| US8436404B2 (en) | 2009-12-30 | 2013-05-07 | Intel Corporation | Self-aligned contacts |
| US8362572B2 (en) * | 2010-02-09 | 2013-01-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Lower parasitic capacitance FinFET |
| KR20120081657A (ko) * | 2010-12-15 | 2012-07-20 | 삼성전자주식회사 | 테스트 마스크 셋트 및 마스크 셋트 |
| FR2976122A1 (fr) * | 2011-05-31 | 2012-12-07 | St Microelectronics Crolles 2 | Transistor mosfet, composant incluant plusieurs tels transistors et procede de fabrication |
| CN102810476B (zh) * | 2011-05-31 | 2016-08-03 | 中国科学院微电子研究所 | 鳍式场效应晶体管的制造方法 |
| US8652932B2 (en) * | 2012-04-17 | 2014-02-18 | International Business Machines Corporation | Semiconductor devices having fin structures, and methods of forming semiconductor devices having fin structures |
| US9006094B2 (en) | 2012-04-18 | 2015-04-14 | International Business Machines Corporation | Stratified gate dielectric stack for gate dielectric leakage reduction |
| US8575683B1 (en) * | 2012-05-16 | 2013-11-05 | United Microelectronics Corp. | Semiconductor device and method of fabricating the same |
| US9059206B2 (en) | 2012-12-10 | 2015-06-16 | International Business Machines Corporation | Epitaxial grown extremely shallow extension region |
| US9136131B2 (en) | 2013-11-04 | 2015-09-15 | Globalfoundries Inc. | Common fill of gate and source and drain contacts |
| US9059311B1 (en) * | 2014-03-05 | 2015-06-16 | International Business Machines Corporation | CMOS transistors with identical active semiconductor region shapes |
| US9735256B2 (en) * | 2014-10-17 | 2017-08-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and structure for FinFET comprising patterned oxide and dielectric layer under spacer features |
| US9397162B1 (en) * | 2014-12-29 | 2016-07-19 | Globalfoundries Inc. | FinFET conformal junction and abrupt junction with reduced damage method and device |
| US10134839B2 (en) * | 2015-05-08 | 2018-11-20 | Raytheon Company | Field effect transistor structure having notched mesa |
| US9425105B1 (en) * | 2015-09-15 | 2016-08-23 | International Business Machines Corporation | Semiconductor device including self-aligned gate structure and improved gate spacer topography |
| US9805973B2 (en) | 2015-10-30 | 2017-10-31 | International Business Machines Corporation | Dual silicide liner flow for enabling low contact resistance |
| US9466693B1 (en) | 2015-11-17 | 2016-10-11 | International Business Machines Corporation | Self aligned replacement metal source/drain finFET |
| US9716154B2 (en) | 2015-12-17 | 2017-07-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure having a gas-filled gap |
| CN105702737B (zh) * | 2016-02-05 | 2019-01-18 | 中国科学院微电子研究所 | 连接有负电容的多栅FinFET及其制造方法及电子设备 |
| US10211302B2 (en) | 2017-06-28 | 2019-02-19 | International Business Machines Corporation | Field effect transistor devices having gate contacts formed in active region overlapping source/drain contacts |
| US10243079B2 (en) | 2017-06-30 | 2019-03-26 | International Business Machines Corporation | Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning |
| US10326440B1 (en) * | 2018-02-28 | 2019-06-18 | Nxp Usa, Inc. | RF switches, integrated circuits, and devices with multi-gate field effect transistors and voltage leveling circuits, and methods of their fabrication |
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| US3590471A (en) | 1969-02-04 | 1971-07-06 | Bell Telephone Labor Inc | Fabrication of insulated gate field-effect transistors involving ion implantation |
| US3708360A (en) | 1970-06-09 | 1973-01-02 | Texas Instruments Inc | Self-aligned gate field effect transistor with schottky barrier drain and source |
| US3983264A (en) | 1972-07-20 | 1976-09-28 | Texas Instruments Incorporated | Metal-semiconductor ohmic contacts and methods of fabrication |
| US4056642A (en) | 1976-05-14 | 1977-11-01 | Data General Corporation | Method of fabricating metal-semiconductor interfaces |
| US4300152A (en) | 1980-04-07 | 1981-11-10 | Bell Telephone Laboratories, Incorporated | Complementary field-effect transistor integrated circuit device |
| US4485550A (en) | 1982-07-23 | 1984-12-04 | At&T Bell Laboratories | Fabrication of schottky-barrier MOS FETs |
| US5021365A (en) | 1986-06-16 | 1991-06-04 | International Business Machines Corporation | Compound semiconductor interface control using cationic ingredient oxide to prevent fermi level pinning |
| US4811077A (en) | 1987-06-18 | 1989-03-07 | International Business Machines Corporation | Compound semiconductor surface termination |
| US5306386A (en) | 1993-04-06 | 1994-04-26 | Hughes Aircraft Company | Arsenic passivation for epitaxial deposition of ternary chalcogenide semiconductor films onto silicon substrates |
| US5596218A (en) | 1993-10-18 | 1997-01-21 | Digital Equipment Corporation | Hot carrier-hard gate oxides by nitrogen implantation before gate oxidation |
| US5478765A (en) | 1994-05-04 | 1995-12-26 | Regents Of The University Of Texas System | Method of making an ultra thin dielectric for electronic devices |
| US5663584A (en) | 1994-05-31 | 1997-09-02 | Welch; James D. | Schottky barrier MOSFET systems and fabrication thereof |
| JP2938351B2 (ja) | 1994-10-18 | 1999-08-23 | 株式会社フロンテック | 電界効果トランジスタ |
| JP2995284B2 (ja) | 1995-08-25 | 1999-12-27 | 工業技術院長 | 電極作成方法 |
| US5612567A (en) | 1996-05-13 | 1997-03-18 | North Carolina State University | Schottky barrier rectifiers and methods of forming same |
| FR2749977B1 (fr) | 1996-06-14 | 1998-10-09 | Commissariat Energie Atomique | Transistor mos a puits quantique et procedes de fabrication de celui-ci |
| JP3217015B2 (ja) | 1996-07-18 | 2001-10-09 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 電界効果トランジスタの形成方法 |
| TW333713B (en) | 1996-08-20 | 1998-06-11 | Toshiba Co Ltd | The semiconductor device and its producing method |
| US5888891A (en) | 1996-08-23 | 1999-03-30 | International Rectifier Corporation | Process for manufacturing a schottky diode with enhanced barrier height and high thermal stability |
| US5939763A (en) | 1996-09-05 | 1999-08-17 | Advanced Micro Devices, Inc. | Ultrathin oxynitride structure and process for VLSI applications |
| US5908313A (en) * | 1996-12-31 | 1999-06-01 | Intel Corporation | Method of forming a transistor |
| US6013553A (en) | 1997-07-24 | 2000-01-11 | Texas Instruments Incorporated | Zirconium and/or hafnium oxynitride gate dielectric |
| US6207976B1 (en) | 1997-12-17 | 2001-03-27 | Fujitsu Limited | Semiconductor device with ohmic contacts on compound semiconductor and manufacture thereof |
| KR100261170B1 (ko) | 1998-05-06 | 2000-07-01 | 김영환 | 반도체소자 및 그 제조방법 |
| US6117781A (en) * | 1999-04-22 | 2000-09-12 | Advanced Micro Devices, Inc. | Optimized trench/via profile for damascene processing |
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| US6261932B1 (en) | 1999-07-29 | 2001-07-17 | Fairchild Semiconductor Corp. | Method of fabricating Schottky diode and related structure |
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| TW497120B (en) * | 2000-03-06 | 2002-08-01 | Toshiba Corp | Transistor, semiconductor device and manufacturing method of semiconductor device |
| US6982460B1 (en) * | 2000-07-07 | 2006-01-03 | International Business Machines Corporation | Self-aligned gate MOSFET with separate gates |
| US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
| JP2004152790A (ja) * | 2002-10-28 | 2004-05-27 | Toshiba Corp | 半導体装置、及び、半導体装置の製造方法 |
| US7238985B2 (en) * | 2003-08-13 | 2007-07-03 | International Rectifier Corporation | Trench type mosgated device with strained layer on trench sidewall |
| US7545023B2 (en) * | 2005-03-22 | 2009-06-09 | United Microelectronics Corp. | Semiconductor transistor |
-
2005
- 2005-06-23 US US11/166,286 patent/US7902029B2/en not_active Expired - Lifetime
- 2005-08-24 AT AT05790815T patent/ATE526680T1/de not_active IP Right Cessation
- 2005-08-24 WO PCT/US2005/030209 patent/WO2006026339A2/en not_active Ceased
- 2005-08-24 EP EP05790815A patent/EP1787320B1/de not_active Expired - Lifetime
-
2011
- 2011-02-02 US US13/019,789 patent/US8263467B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8263467B2 (en) | 2012-09-11 |
| US20060084232A1 (en) | 2006-04-20 |
| US7902029B2 (en) | 2011-03-08 |
| EP1787320B1 (de) | 2011-09-28 |
| US20110124170A1 (en) | 2011-05-26 |
| EP1787320A2 (de) | 2007-05-23 |
| WO2006026339A2 (en) | 2006-03-09 |
| WO2006026339A3 (en) | 2006-05-04 |
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