ATE527756T1 - Doppel-rest-pipeline-ad-umsetzer - Google Patents

Doppel-rest-pipeline-ad-umsetzer

Info

Publication number
ATE527756T1
ATE527756T1 AT04770279T AT04770279T ATE527756T1 AT E527756 T1 ATE527756 T1 AT E527756T1 AT 04770279 T AT04770279 T AT 04770279T AT 04770279 T AT04770279 T AT 04770279T AT E527756 T1 ATE527756 T1 AT E527756T1
Authority
AT
Austria
Prior art keywords
residue
converter
switched capacitor
cascade
operational amplifiers
Prior art date
Application number
AT04770279T
Other languages
English (en)
Inventor
Der Ploeg Hendrik Van
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE527756T1 publication Critical patent/ATE527756T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H03M1/165—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages in which two or more residues with respect to different reference levels in a stage are used as input signals for the next stage, i.e. multi-residue type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
AT04770279T 2003-10-23 2004-10-18 Doppel-rest-pipeline-ad-umsetzer ATE527756T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03103935 2003-10-23
PCT/IB2004/052129 WO2005041418A1 (en) 2003-10-23 2004-10-18 A dual residue pipelined ad converter

Publications (1)

Publication Number Publication Date
ATE527756T1 true ATE527756T1 (de) 2011-10-15

Family

ID=34486348

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04770279T ATE527756T1 (de) 2003-10-23 2004-10-18 Doppel-rest-pipeline-ad-umsetzer

Country Status (6)

Country Link
US (1) US7330145B2 (de)
EP (1) EP1678831B1 (de)
JP (1) JP2007509564A (de)
CN (1) CN1871774B (de)
AT (1) ATE527756T1 (de)
WO (1) WO2005041418A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1770867B1 (de) 2005-09-08 2017-05-31 Marvell World Trade Ltd. Kapazitiver Digital Analog Wandler und Analog Digital Wandler
US7439896B2 (en) 2005-09-08 2008-10-21 Marvell World Trade Ltd. Capacitive digital to analog and analog to digital converters
JP4879774B2 (ja) * 2007-02-20 2012-02-22 ルネサスエレクトロニクス株式会社 アナログ・デジタル変換器
US7567197B2 (en) * 2007-09-17 2009-07-28 Samsung Electronics Co., Ltd. Cascade comparator and control method thereof
US7492296B1 (en) * 2007-09-28 2009-02-17 Cirrus Logic, Inc. Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with input signal and common-mode current nulling
FR2934098B1 (fr) * 2008-07-16 2011-12-02 Groupe Des Ecoles De Telecommunications Get Ecole Nationale Superieure Des Telecommunications Enst Dispositif et procede de traitement du signal utilisant plus plusieurs voies de traitement en parallele.
WO2011104761A1 (ja) * 2010-02-26 2011-09-01 国立大学法人東京工業大学 パイプライン型ａ／ｄコンバータおよびａ／ｄ変換方法
JP5609522B2 (ja) 2010-10-15 2014-10-22 ソニー株式会社 アナログデジタル変換器および信号処理システム
JP2012227775A (ja) 2011-04-20 2012-11-15 Sony Corp アナログデジタル変換器および信号処理システム
JP2012227774A (ja) 2011-04-20 2012-11-15 Sony Corp アナログデジタル変換器および信号処理システム
FR2987526B1 (fr) * 2012-02-27 2016-02-26 Centre Nat Rech Scient Dispositif de conversion de signaux analogiques en signaux numeriques
JP5904022B2 (ja) * 2012-06-08 2016-04-13 富士通株式会社 Ａｄ変換装置及びａｄ変換方法
FI126662B (en) 2013-11-22 2017-03-31 Murata Manufacturing Co Capacitance processing conversion circuit
US9609259B1 (en) * 2016-01-25 2017-03-28 Pixart Imaging (Penang) Sdn. Bhd. Pipelined analog-to-digital converter incorporating variable input gain and pixel read out analog front end having the same
US9893740B1 (en) 2017-01-13 2018-02-13 Semiconductor Components Industries, Llc Methods and apparatus for an analog-to-digital converter

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5387914A (en) * 1993-02-22 1995-02-07 Analog Devices, Incorporated Correction range technique for multi-range A/D converter
US5739781A (en) * 1996-10-08 1998-04-14 National Semiconductor Corporation Sub-ranging analog-to-digital converter with open-loop differential amplifiers
SE9604616L (sv) * 1996-12-16 1998-06-17 Ericsson Telefon Ab L M Analog-digitalomvandling av pipelinetyp
US6031480A (en) * 1997-11-04 2000-02-29 Texas Instruments Incorporated Method and apparatus for implementing a pipelined A/D converter with inter-stage amplifiers having no common mode feedback circuitry
US6169502B1 (en) * 1998-05-08 2001-01-02 Cirrus Logic, Inc. Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products
US6344966B1 (en) * 1998-09-08 2002-02-05 Showa Denko K.K. Solid electrolytic capacitor and method for producing the same
US6097326A (en) * 1998-05-26 2000-08-01 National Semiconductor Corporation Algorithmic analog-to-digital converter with reduced differential non-linearity and method
US6337651B1 (en) * 2000-02-17 2002-01-08 Advanced Micro Devices, Inc. Pipeline analog to digital (A/D) converter with relaxed accuracy requirement for sample and hold stage
US6366230B1 (en) * 2000-06-07 2002-04-02 Texas Instruments Incorporated Pipelined analog-to-digital converter
US6486820B1 (en) * 2001-03-19 2002-11-26 Cisco Systems Wireless Networking (Australia) Pty Limited Pipeline analog-to-digital converter with common mode following reference generator
US6600440B1 (en) * 2001-08-15 2003-07-29 National Semiconductor Corporation Capacitor mismatch independent gain stage for pipeline analog to digital converters
ATE311041T1 (de) * 2003-09-23 2005-12-15 Cit Alcatel Pipeline analog-digital-wandler

Also Published As

Publication number Publication date
EP1678831A1 (de) 2006-07-12
CN1871774B (zh) 2011-03-16
US20070132629A1 (en) 2007-06-14
JP2007509564A (ja) 2007-04-12
CN1871774A (zh) 2006-11-29
US7330145B2 (en) 2008-02-12
WO2005041418A1 (en) 2005-05-06
EP1678831B1 (de) 2011-10-05

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Legal Events

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