ATE534192T1 - Spreizspektrum-taktung in einem fraktional-n-pll - Google Patents

Spreizspektrum-taktung in einem fraktional-n-pll

Info

Publication number
ATE534192T1
ATE534192T1 AT08803731T AT08803731T ATE534192T1 AT E534192 T1 ATE534192 T1 AT E534192T1 AT 08803731 T AT08803731 T AT 08803731T AT 08803731 T AT08803731 T AT 08803731T AT E534192 T1 ATE534192 T1 AT E534192T1
Authority
AT
Austria
Prior art keywords
phase
logic
fractional
spread spectrum
control signal
Prior art date
Application number
AT08803731T
Other languages
English (en)
Inventor
Puneet Sareen
Hermann Seibold
Original Assignee
Texas Instruments Deutschland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Deutschland filed Critical Texas Instruments Deutschland
Application granted granted Critical
Publication of ATE534192T1 publication Critical patent/ATE534192T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0998Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator using phase interpolation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0996Selecting a signal among the plurality of phase-shifted signals produced by the ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT08803731T 2007-09-05 2008-09-05 Spreizspektrum-taktung in einem fraktional-n-pll ATE534192T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102007042070A DE102007042070B3 (de) 2007-09-05 2007-09-05 Spread-Spectrum-Taktung in Fraktional-N-PLLs
US1690007P 2007-12-27 2007-12-27
PCT/EP2008/061762 WO2009030742A1 (en) 2007-09-05 2008-09-05 Spread spectrum clocking in fractional-n pll

Publications (1)

Publication Number Publication Date
ATE534192T1 true ATE534192T1 (de) 2011-12-15

Family

ID=40121759

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08803731T ATE534192T1 (de) 2007-09-05 2008-09-05 Spreizspektrum-taktung in einem fraktional-n-pll

Country Status (5)

Country Link
US (1) US7737791B2 (de)
EP (1) EP2191573B1 (de)
AT (1) ATE534192T1 (de)
DE (1) DE102007042070B3 (de)
WO (1) WO2009030742A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7782988B2 (en) * 2005-05-02 2010-08-24 Multigig Inc. Digital frequency synthesizer
US8411782B2 (en) * 2008-07-29 2013-04-02 Fujitsu Limited Parallel generation and matching of a deskew channel
US8300754B2 (en) * 2008-07-29 2012-10-30 Fujitsu Limited Clock and data recovery with a data aligner
US8300753B2 (en) 2008-07-29 2012-10-30 Fujitsu Limited Triple loop clock and data recovery (CDR)
US8718217B2 (en) * 2008-07-29 2014-05-06 Fujitsu Limited Clock and data recovery (CDR) using phase interpolation
US7847643B2 (en) 2008-11-07 2010-12-07 Infineon Technologies Ag Circuit with multiphase oscillator
US8320770B2 (en) * 2009-03-20 2012-11-27 Fujitsu Limited Clock and data recovery for differential quadrature phase shift keying
US8638896B2 (en) * 2010-03-19 2014-01-28 Netlogic Microsystems, Inc. Repeate architecture with single clock multiplier unit
US9094028B2 (en) 2012-04-11 2015-07-28 Rambus Inc. Wide range frequency synthesizer with quadrature generation and spur cancellation
TWI505642B (zh) * 2012-12-21 2015-10-21 Nat Univ Chung Cheng All - digital Spread Spectrum Clock Generation Circuit with Electromagnetic Interference Effect Decay and Its Control Method
US8952736B1 (en) * 2013-10-09 2015-02-10 Nvidia Corporation Method and system for quantization-free and phase-dithered fractional-N generation for phase-locked-loops
US9244484B2 (en) 2013-12-11 2016-01-26 International Business Machines Corporation Fractional-N spread spectrum state machine
WO2015172372A1 (en) * 2014-05-16 2015-11-19 Lattice Semiconductor Corporation Fractional-n phase locked loop circuit
US10826738B2 (en) 2019-01-07 2020-11-03 Innophase Inc. Systems and methods for maximizing power efficiency of a digital power amplifier in a polar transmitter
US10651876B1 (en) 2019-06-12 2020-05-12 Innophase Inc. System and method for dividing the carrier center frequency of an RF modulated signal by a non-integer divisor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4110081B2 (ja) * 2002-12-06 2008-07-02 ザインエレクトロニクス株式会社 位相選択型周波数変調装置及び位相選択型周波数シンセサイザ
DE10257185B3 (de) * 2002-12-06 2004-02-05 Infineon Technologies Ag Phasenregelschleife mit Sigma-Delta-Modulator
US6919744B2 (en) * 2003-08-20 2005-07-19 Agere Systems Inc. Spectrum profile control for a PLL and the like
US7042258B2 (en) 2004-04-29 2006-05-09 Agere Systems Inc. Signal generator with selectable mode control
DE102005050828B4 (de) * 2004-12-22 2011-08-18 Texas Instruments Deutschland GmbH, 85356 Verfahren und Vorrichtung zur Teilung einer Frequenz durch einen Fraktionalteiler und Fraktional-n-PLL
KR100712527B1 (ko) * 2005-08-18 2007-04-27 삼성전자주식회사 지터를 감소시킨 분산 스펙트럼 클럭 발생기

Also Published As

Publication number Publication date
US7737791B2 (en) 2010-06-15
US20090066423A1 (en) 2009-03-12
EP2191573A1 (de) 2010-06-02
EP2191573B1 (de) 2011-11-16
DE102007042070B3 (de) 2009-01-15
WO2009030742A1 (en) 2009-03-12

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