ATE535010T1 - Verfahren zur herstllung selbstausgerichteten transistortopologien in siliziumkarbid durch verwendung selektiver epitaxie - Google Patents

Verfahren zur herstllung selbstausgerichteten transistortopologien in siliziumkarbid durch verwendung selektiver epitaxie

Info

Publication number
ATE535010T1
ATE535010T1 AT02806537T AT02806537T ATE535010T1 AT E535010 T1 ATE535010 T1 AT E535010T1 AT 02806537 T AT02806537 T AT 02806537T AT 02806537 T AT02806537 T AT 02806537T AT E535010 T1 ATE535010 T1 AT E535010T1
Authority
AT
Austria
Prior art keywords
silicon carbide
selective epitaxy
producing self
transistors
aligned transistor
Prior art date
Application number
AT02806537T
Other languages
English (en)
Inventor
Jeffrey Casady
Geoffrey Carter
Yaroslav Koshka
Michael Mazzola
Igor Sankin
Original Assignee
Univ Mississippi State
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Mississippi State filed Critical Univ Mississippi State
Application granted granted Critical
Publication of ATE535010T1 publication Critical patent/ATE535010T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/01—Manufacture or treatment
    • H10D8/051—Manufacture or treatment of Schottky diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/202—FETs having static field-induced regions, e.g. static-induction transistors [SIT] or permeable base transistors [PBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/01—Manufacture or treatment
    • H10D8/043—Manufacture or treatment of planar diodes

Landscapes

  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT02806537T 2001-07-12 2002-07-12 Verfahren zur herstllung selbstausgerichteten transistortopologien in siliziumkarbid durch verwendung selektiver epitaxie ATE535010T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US30442301P 2001-07-12 2001-07-12
PCT/US2002/022281 WO2003075319A2 (en) 2001-07-12 2002-07-12 Self-aligned transistor and diode topologies

Publications (1)

Publication Number Publication Date
ATE535010T1 true ATE535010T1 (de) 2011-12-15

Family

ID=27788870

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02806537T ATE535010T1 (de) 2001-07-12 2002-07-12 Verfahren zur herstllung selbstausgerichteten transistortopologien in siliziumkarbid durch verwendung selektiver epitaxie

Country Status (6)

Country Link
US (1) US6767783B2 (de)
EP (1) EP1428248B1 (de)
JP (2) JP4234016B2 (de)
AT (1) ATE535010T1 (de)
AU (1) AU2002367561A1 (de)
WO (1) WO2003075319A2 (de)

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Also Published As

Publication number Publication date
AU2002367561A8 (en) 2003-09-16
AU2002367561A1 (en) 2003-09-16
US6767783B2 (en) 2004-07-27
EP1428248B1 (de) 2011-11-23
EP1428248A4 (de) 2007-03-28
WO2003075319A3 (en) 2004-02-12
US20030034495A1 (en) 2003-02-20
EP1428248A2 (de) 2004-06-16
WO2003075319A2 (en) 2003-09-12
JP2009049426A (ja) 2009-03-05
JP2005520322A (ja) 2005-07-07
JP4234016B2 (ja) 2009-03-04

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