ATE538437T1 - Verfahren und schnittstelle zur effizienzverbesserung bei ausführung von bus-zu- bus-lesedatenübertragungen - Google Patents

Verfahren und schnittstelle zur effizienzverbesserung bei ausführung von bus-zu- bus-lesedatenübertragungen

Info

Publication number
ATE538437T1
ATE538437T1 AT02255959T AT02255959T ATE538437T1 AT E538437 T1 ATE538437 T1 AT E538437T1 AT 02255959 T AT02255959 T AT 02255959T AT 02255959 T AT02255959 T AT 02255959T AT E538437 T1 ATE538437 T1 AT E538437T1
Authority
AT
Austria
Prior art keywords
bus
interface
read data
data transfers
improving efficiency
Prior art date
Application number
AT02255959T
Other languages
English (en)
Inventor
William Gordon Keith Dobson
Joel Danzig
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of ATE538437T1 publication Critical patent/ATE538437T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
AT02255959T 2001-08-28 2002-08-28 Verfahren und schnittstelle zur effizienzverbesserung bei ausführung von bus-zu- bus-lesedatenübertragungen ATE538437T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/939,800 US6766386B2 (en) 2001-08-28 2001-08-28 Method and interface for improved efficiency in performing bus-to-bus read data transfers

Publications (1)

Publication Number Publication Date
ATE538437T1 true ATE538437T1 (de) 2012-01-15

Family

ID=25473753

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02255959T ATE538437T1 (de) 2001-08-28 2002-08-28 Verfahren und schnittstelle zur effizienzverbesserung bei ausführung von bus-zu- bus-lesedatenübertragungen

Country Status (3)

Country Link
US (2) US6766386B2 (de)
EP (1) EP1288785B1 (de)
AT (1) ATE538437T1 (de)

Families Citing this family (18)

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US6807593B1 (en) * 2001-11-01 2004-10-19 Lsi Logic Corporation Enhanced bus architecture for posted read operation between masters and slaves
US7051145B2 (en) * 2001-12-10 2006-05-23 Emulex Design & Manufacturing Corporation Tracking deferred data transfers on a system-interconnect bus
US6731292B2 (en) * 2002-03-06 2004-05-04 Sun Microsystems, Inc. System and method for controlling a number of outstanding data transactions within an integrated circuit
US6766405B2 (en) * 2002-03-28 2004-07-20 International Business Machines Corporation Accelerated error detection in a bus bridge circuit
US7124230B2 (en) * 2002-04-30 2006-10-17 Intel Corporation Use of bus transaction identification codes
US6931473B2 (en) * 2002-07-16 2005-08-16 International Business Machines Corporation Data transfer via Host/PCI-X bridges
US7054971B2 (en) * 2002-08-29 2006-05-30 Seiko Epson Corporation Interface between a host and a slave device having a latency greater than the latency of the host
US7363412B1 (en) * 2004-03-01 2008-04-22 Cisco Technology, Inc. Interrupting a microprocessor after a data transmission is complete
US20050232302A1 (en) * 2004-04-15 2005-10-20 Tillotson Timothy N Translation between SCPI protocol communications and .NET protocol communications
US7549004B1 (en) * 2004-08-20 2009-06-16 Altera Corporation Split filtering in multilayer systems
US8521970B2 (en) * 2006-04-19 2013-08-27 Lexmark International, Inc. Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
US9245591B2 (en) * 2005-06-16 2016-01-26 Lexmark International, Inc. Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
US7532636B2 (en) * 2005-10-07 2009-05-12 Intel Corporation High bus bandwidth transfer using split data bus
US7610431B1 (en) * 2005-10-14 2009-10-27 Sun Microsystems, Inc. Configuration space compaction
JP2011081551A (ja) * 2009-10-06 2011-04-21 Panasonic Corp データ処理システム
US8893146B2 (en) * 2009-11-13 2014-11-18 Hewlett-Packard Development Company, L.P. Method and system of an I/O stack for controlling flows of workload specific I/O requests
JP5617429B2 (ja) * 2010-08-19 2014-11-05 ソニー株式会社 バスシステムおよびバスシステムと接続機器とを接続するブリッジ回路

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US5574868A (en) * 1993-05-14 1996-11-12 Intel Corporation Bus grant prediction technique for a split transaction bus in a multiprocessor computer system
US5708794A (en) * 1993-08-10 1998-01-13 Dell Usa, L.P. Multi-purpose usage of transaction backoff and bus architecture supporting same
US5504874A (en) * 1993-09-29 1996-04-02 Silicon Graphics, Inc. System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions
US5655102A (en) * 1993-09-29 1997-08-05 Silicon Graphics, Inc. System and method for piggybacking of read responses on a shared memory multiprocessor bus
US5535345A (en) * 1994-05-12 1996-07-09 Intel Corporation Method and apparatus for sequencing misaligned external bus transactions in which the order of completion of corresponding split transaction requests is guaranteed
US5535340A (en) * 1994-05-20 1996-07-09 Intel Corporation Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge
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US5996036A (en) * 1997-01-07 1999-11-30 Apple Computers, Inc. Bus transaction reordering in a computer system having unordered slaves
US5793996A (en) * 1995-05-03 1998-08-11 Apple Computer, Inc. Bridge for interconnecting a computer system bus, an expansion bus and a video frame buffer
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Also Published As

Publication number Publication date
US20040221075A1 (en) 2004-11-04
US20030046473A1 (en) 2003-03-06
US6766386B2 (en) 2004-07-20
EP1288785A3 (de) 2006-04-05
EP1288785A2 (de) 2003-03-05
EP1288785B1 (de) 2011-12-21

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