ATE540357T1 - Verfahren zur erkennung eines angriffs durch fehlerinjektion in eine speichervorrichtung und entsprechende speichervorrichtung - Google Patents

Verfahren zur erkennung eines angriffs durch fehlerinjektion in eine speichervorrichtung und entsprechende speichervorrichtung

Info

Publication number
ATE540357T1
ATE540357T1 AT10163778T AT10163778T ATE540357T1 AT E540357 T1 ATE540357 T1 AT E540357T1 AT 10163778 T AT10163778 T AT 10163778T AT 10163778 T AT10163778 T AT 10163778T AT E540357 T1 ATE540357 T1 AT E540357T1
Authority
AT
Austria
Prior art keywords
storage device
attack
fault injection
memory
memory cells
Prior art date
Application number
AT10163778T
Other languages
English (en)
Inventor
Mathieu Lisart
Julien Mercier
Original Assignee
St Microelectronics Rousset
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Rousset filed Critical St Microelectronics Rousset
Application granted granted Critical
Publication of ATE540357T1 publication Critical patent/ATE540357T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032—Simple parity
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
AT10163778T 2009-06-16 2010-05-25 Verfahren zur erkennung eines angriffs durch fehlerinjektion in eine speichervorrichtung und entsprechende speichervorrichtung ATE540357T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0954025A FR2946787A1 (fr) 2009-06-16 2009-06-16 Procede de detection d'une attaque par injection de faute d'un dispositif de memoire, et dispositif de memoire correspondant

Publications (1)

Publication Number Publication Date
ATE540357T1 true ATE540357T1 (de) 2012-01-15

Family

ID=41508280

Family Applications (1)

Application Number Title Priority Date Filing Date
AT10163778T ATE540357T1 (de) 2009-06-16 2010-05-25 Verfahren zur erkennung eines angriffs durch fehlerinjektion in eine speichervorrichtung und entsprechende speichervorrichtung

Country Status (6)

Country Link
US (1) US8397152B2 (de)
EP (1) EP2264596B1 (de)
JP (1) JP2011003189A (de)
CN (1) CN101923903B (de)
AT (1) ATE540357T1 (de)
FR (1) FR2946787A1 (de)

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* Cited by examiner, † Cited by third party
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KR20090043823A (ko) * 2007-10-30 2009-05-07 삼성전자주식회사 외부 공격을 감지할 수 있는 메모리 시스템
FR2948795A1 (fr) * 2009-07-30 2011-02-04 St Microelectronics Rousset Detecteur d'injection de fautes dans un circuit integre
KR101977733B1 (ko) * 2012-07-12 2019-05-13 삼성전자주식회사 오류 기반 공격의 검출 방법
JP5954872B2 (ja) * 2012-09-20 2016-07-20 ルネサスエレクトロニクス株式会社 半導体集積回路
DE102014102623A1 (de) 2014-02-27 2015-08-27 Infineon Technologies Ag Speicheranordnung und verfahren zum detektieren eines angriffs auf eine speicheranordnung
CN104992126B (zh) * 2015-06-24 2018-08-03 深圳先进技术研究院 一种抗错误注入攻击的安全芯片加固方法及装置
US9929858B2 (en) 2015-09-21 2018-03-27 Nxp B.V. Method and system for detecting fault attacks
CN106855932B (zh) * 2015-12-08 2021-03-02 国民技术股份有限公司 一种存储系统及其故障防御方法、装置
GB201607589D0 (en) * 2016-04-29 2016-06-15 Nagravision Sa Integrated circuit device
FR3051599A1 (fr) * 2016-05-17 2017-11-24 Stmicroelectronics Rousset Protection d'un circuit integre
EP3438832B1 (de) * 2017-08-03 2020-10-07 Siemens Aktiengesellschaft Verfahren zur ausführung eines programms in einem computer
CN107424650B (zh) * 2017-08-11 2021-04-27 北京兆易创新科技股份有限公司 一种存储器及其探测方法、以及芯片
CN109541444B (zh) * 2018-10-18 2021-11-02 天津大学 基于混合粒度奇偶校验的集成电路故障注入检测方法
CN109815038B (zh) * 2018-12-04 2022-03-29 天津大学 一种基于局部重布局的奇偶校验故障注入检测方法
CN109614056B (zh) * 2018-12-28 2021-11-23 杭州迪普科技股份有限公司 一种应对内存自然老化的方法和装置
TWI714248B (zh) * 2019-09-09 2020-12-21 新唐科技股份有限公司 記憶體控制器與資料保護方法
US11244046B2 (en) 2019-09-16 2022-02-08 Nuvoton Technology Corporation Data-sampling integrity check using gated clock
US11321457B2 (en) 2019-09-16 2022-05-03 Nuvoton Technology Corporation Data-sampling integrity check by sampling using flip-flops with relative delay
US12032684B2 (en) 2022-01-14 2024-07-09 Nxp B.V. Method for detecting a fault injection in a data processing system
CN114328001B (zh) * 2022-03-11 2022-07-19 紫光同芯微电子有限公司 用于ram受到故障注入攻击的检测方法、装置和存储介质

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KR101537018B1 (ko) * 2008-10-01 2015-07-17 삼성전자주식회사 보안 메모리 인터페이스, 이를 포함하는 시스템 및 스마트카드

Also Published As

Publication number Publication date
JP2011003189A (ja) 2011-01-06
CN101923903A (zh) 2010-12-22
US20100318885A1 (en) 2010-12-16
CN101923903B (zh) 2015-02-04
FR2946787A1 (fr) 2010-12-17
EP2264596B1 (de) 2012-01-04
EP2264596A1 (de) 2010-12-22
US8397152B2 (en) 2013-03-12

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