ATE469420T1 - System und verfahren zur verwendung eines on-chip-schreibcache eines nichtflüchtigen speichers - Google Patents
System und verfahren zur verwendung eines on-chip-schreibcache eines nichtflüchtigen speichersInfo
- Publication number
- ATE469420T1 ATE469420T1 AT05854199T AT05854199T ATE469420T1 AT E469420 T1 ATE469420 T1 AT E469420T1 AT 05854199 T AT05854199 T AT 05854199T AT 05854199 T AT05854199 T AT 05854199T AT E469420 T1 ATE469420 T1 AT E469420T1
- Authority
- AT
- Austria
- Prior art keywords
- write cache
- volatile memory
- chip write
- volatile
- array
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2245—Memory devices with an internal cache buffer
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/021,200 US7882299B2 (en) | 2004-12-21 | 2004-12-21 | System and method for use of on-chip non-volatile memory write cache |
| PCT/US2005/045431 WO2006068916A1 (en) | 2004-12-21 | 2005-12-14 | System and method for use of on-chip non-volatile memory write cache |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE469420T1 true ATE469420T1 (de) | 2010-06-15 |
Family
ID=36283836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05854199T ATE469420T1 (de) | 2004-12-21 | 2005-12-14 | System und verfahren zur verwendung eines on-chip-schreibcache eines nichtflüchtigen speichers |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7882299B2 (de) |
| EP (1) | EP1829047B1 (de) |
| JP (1) | JP4834676B2 (de) |
| KR (2) | KR20100022026A (de) |
| AT (1) | ATE469420T1 (de) |
| DE (1) | DE602005021544D1 (de) |
| TW (1) | TW200634823A (de) |
| WO (1) | WO2006068916A1 (de) |
Families Citing this family (87)
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-
2004
- 2004-12-21 US US11/021,200 patent/US7882299B2/en active Active
-
2005
- 2005-12-14 EP EP05854199A patent/EP1829047B1/de not_active Expired - Lifetime
- 2005-12-14 JP JP2007548312A patent/JP4834676B2/ja not_active Expired - Lifetime
- 2005-12-14 DE DE602005021544T patent/DE602005021544D1/de not_active Expired - Lifetime
- 2005-12-14 AT AT05854199T patent/ATE469420T1/de not_active IP Right Cessation
- 2005-12-14 WO PCT/US2005/045431 patent/WO2006068916A1/en not_active Ceased
- 2005-12-14 KR KR1020097024956A patent/KR20100022026A/ko not_active Withdrawn
- 2005-12-14 KR KR1020077014037A patent/KR101040961B1/ko not_active Expired - Fee Related
- 2005-12-21 TW TW094145663A patent/TW200634823A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| JP4834676B2 (ja) | 2011-12-14 |
| JP2008524747A (ja) | 2008-07-10 |
| DE602005021544D1 (de) | 2010-07-08 |
| TW200634823A (en) | 2006-10-01 |
| KR101040961B1 (ko) | 2011-06-16 |
| EP1829047B1 (de) | 2010-05-26 |
| US7882299B2 (en) | 2011-02-01 |
| KR20100022026A (ko) | 2010-02-26 |
| WO2006068916A1 (en) | 2006-06-29 |
| US20060136656A1 (en) | 2006-06-22 |
| EP1829047A1 (de) | 2007-09-05 |
| KR20070104529A (ko) | 2007-10-26 |
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