ATE541313T1 - Verpackung für eine integrierte schaltung mit je einem substrat auf beiden seiten und mit einem leiterrahmen der leiter mit erhöhter dicke aufweist - Google Patents

Verpackung für eine integrierte schaltung mit je einem substrat auf beiden seiten und mit einem leiterrahmen der leiter mit erhöhter dicke aufweist

Info

Publication number
ATE541313T1
ATE541313T1 AT05075241T AT05075241T ATE541313T1 AT E541313 T1 ATE541313 T1 AT E541313T1 AT 05075241 T AT05075241 T AT 05075241T AT 05075241 T AT05075241 T AT 05075241T AT E541313 T1 ATE541313 T1 AT E541313T1
Authority
AT
Austria
Prior art keywords
integrated circuit
substrate
packaging
sides
increased thickness
Prior art date
Application number
AT05075241T
Other languages
English (en)
Inventor
Roger A Mock
Erich W Gerbsch
Original Assignee
Delphi Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Delphi Tech Inc filed Critical Delphi Tech Inc
Application granted granted Critical
Publication of ATE541313T1 publication Critical patent/ATE541313T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49222—Contact or terminal manufacturing by assembling plural parts forming array of contacts or terminals

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
AT05075241T 2004-02-17 2005-01-31 Verpackung für eine integrierte schaltung mit je einem substrat auf beiden seiten und mit einem leiterrahmen der leiter mit erhöhter dicke aufweist ATE541313T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/780,163 US7148564B2 (en) 2004-02-17 2004-02-17 Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness

Publications (1)

Publication Number Publication Date
ATE541313T1 true ATE541313T1 (de) 2012-01-15

Family

ID=34701440

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05075241T ATE541313T1 (de) 2004-02-17 2005-01-31 Verpackung für eine integrierte schaltung mit je einem substrat auf beiden seiten und mit einem leiterrahmen der leiter mit erhöhter dicke aufweist

Country Status (3)

Country Link
US (4) US7148564B2 (de)
EP (1) EP1564811B1 (de)
AT (1) ATE541313T1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7148564B2 (en) * 2004-02-17 2006-12-12 Delphi Technologies, Inc. Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness
JP2006222406A (ja) * 2004-08-06 2006-08-24 Denso Corp 半導体装置
US20080054496A1 (en) 2006-08-30 2008-03-06 Neill Thornton High temperature operating package and circuit design
US20090001546A1 (en) * 2007-06-28 2009-01-01 Flederbach Lynda G Ultra-thick thick film on ceramic substrate
CA2978795A1 (en) 2015-03-16 2016-09-22 Dana Canada Corporation Heat exchangers with plates having surface patterns for enhancing flatness and methods for manufacturing same
KR102733494B1 (ko) * 2020-02-13 2024-11-25 엘지마그나 이파워트레인 주식회사 전력 모듈

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3945808A (en) * 1974-04-15 1976-03-23 Amp Incorporated Lead frame adapted for electrical switch package
JPS62254457A (ja) * 1986-04-28 1987-11-06 Nec Corp Ｉｃ用リ−ドフレ−ム
US5166098A (en) * 1988-03-05 1992-11-24 Deutsche Itt Industries Gmbh Method of manufacturing an encapsulated semiconductor device with a can type housing
JPH0547980A (ja) * 1991-08-08 1993-02-26 Sumitomo Metal Mining Co Ltd 半導体装置用ｉｃリ−ドフレ−ム
JPH06252334A (ja) * 1993-02-26 1994-09-09 Hitachi Constr Mach Co Ltd 半導体装置
US5340771A (en) * 1993-03-18 1994-08-23 Lsi Logic Corporation Techniques for providing high I/O count connections to semiconductor dies
KR100386061B1 (ko) * 1995-10-24 2003-08-21 오끼 덴끼 고오교 가부시끼가이샤 크랙을방지하기위한개량된구조를가지는반도체장치및리이드프레임
KR100186309B1 (ko) * 1996-05-17 1999-03-20 문정환 적층형 버텀 리드 패키지
US5677567A (en) * 1996-06-17 1997-10-14 Micron Technology, Inc. Leads between chips assembly
US6072228A (en) * 1996-10-25 2000-06-06 Micron Technology, Inc. Multi-part lead frame with dissimilar materials and method of manufacturing
JP3487173B2 (ja) * 1997-05-26 2004-01-13 セイコーエプソン株式会社 Ｔａｂ用テープキャリア、集積回路装置及び電子機器
JPH11288751A (ja) * 1998-04-03 1999-10-19 Alps Electric Co Ltd プリント配線基板への端子の取付構造
US6122822A (en) * 1998-06-23 2000-09-26 Vanguard International Semiconductor Corporation Method for balancing mold flow in encapsulating devices
US6307755B1 (en) * 1999-05-27 2001-10-23 Richard K. Williams Surface mount semiconductor package, die-leadframe combination and leadframe therefor and method of mounting leadframes to surfaces of semiconductor die
JP4416140B2 (ja) * 2000-04-14 2010-02-17 日本インター株式会社 樹脂封止型半導体装置
US6781225B2 (en) * 2000-09-15 2004-08-24 Chipmos Technologies Inc. Glueless integrated circuit system in a packaging module
US6459148B1 (en) * 2000-11-13 2002-10-01 Walsin Advanced Electronics Ltd QFN semiconductor package
US6812553B2 (en) * 2002-01-16 2004-11-02 Delphi Technologies, Inc. Electrically isolated and thermally conductive double-sided pre-packaged component
TW540123B (en) * 2002-06-14 2003-07-01 Siliconware Precision Industries Co Ltd Flip-chip semiconductor package with lead frame as chip carrier
US7148564B2 (en) * 2004-02-17 2006-12-12 Delphi Technologies, Inc. Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness
US7202105B2 (en) * 2004-06-28 2007-04-10 Semiconductor Components Industries, L.L.C. Multi-chip semiconductor connector assembly method

Also Published As

Publication number Publication date
US20070069348A1 (en) 2007-03-29
EP1564811A3 (de) 2007-08-08
US7148564B2 (en) 2006-12-12
EP1564811B1 (de) 2012-01-11
US20050179123A1 (en) 2005-08-18
US20080198568A1 (en) 2008-08-21
US7697303B2 (en) 2010-04-13
US20100133672A1 (en) 2010-06-03
EP1564811A2 (de) 2005-08-17

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