ATE546834T1 - Thermisch verbesserter halbleiterträger - Google Patents

Thermisch verbesserter halbleiterträger

Info

Publication number
ATE546834T1
ATE546834T1 AT01000049T AT01000049T ATE546834T1 AT E546834 T1 ATE546834 T1 AT E546834T1 AT 01000049 T AT01000049 T AT 01000049T AT 01000049 T AT01000049 T AT 01000049T AT E546834 T1 ATE546834 T1 AT E546834T1
Authority
AT
Austria
Prior art keywords
chip
board
semiconductor carrier
improved semiconductor
thermally improved
Prior art date
Application number
AT01000049T
Other languages
English (en)
Inventor
Masood Murtuza
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of ATE546834T1 publication Critical patent/ATE546834T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias

Landscapes

  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
AT01000049T 2000-03-16 2001-03-09 Thermisch verbesserter halbleiterträger ATE546834T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US18974100P 2000-03-16 2000-03-16

Publications (1)

Publication Number Publication Date
ATE546834T1 true ATE546834T1 (de) 2012-03-15

Family

ID=22698576

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01000049T ATE546834T1 (de) 2000-03-16 2001-03-09 Thermisch verbesserter halbleiterträger

Country Status (4)

Country Link
US (2) US6900534B2 (de)
EP (1) EP1134804B1 (de)
JP (1) JP2001291801A (de)
AT (1) ATE546834T1 (de)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3756689B2 (ja) * 1999-02-08 2006-03-15 沖電気工業株式会社 半導体装置及びその製造方法
US7115986B2 (en) 2001-05-02 2006-10-03 Micron Technology, Inc. Flexible ball grid array chip scale packages
SG122743A1 (en) 2001-08-21 2006-06-29 Micron Technology Inc Microelectronic devices and methods of manufacture
US6841413B2 (en) * 2002-01-07 2005-01-11 Intel Corporation Thinned die integrated circuit package
US20050136640A1 (en) * 2002-01-07 2005-06-23 Chuan Hu Die exhibiting an effective coefficient of thermal expansion equivalent to a substrate mounted thereon, and processes of making same
SG104293A1 (en) 2002-01-09 2004-06-21 Micron Technology Inc Elimination of rdl using tape base flip chip on flex for die stacking
US6975035B2 (en) * 2002-03-04 2005-12-13 Micron Technology, Inc. Method and apparatus for dielectric filling of flip chip on interposer assembly
SG115456A1 (en) * 2002-03-04 2005-10-28 Micron Technology Inc Semiconductor die packages with recessed interconnecting structures and methods for assembling the same
SG111935A1 (en) 2002-03-04 2005-06-29 Micron Technology Inc Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods
SG115455A1 (en) 2002-03-04 2005-10-28 Micron Technology Inc Methods for assembly and packaging of flip chip configured dice with interposer
SG121707A1 (en) 2002-03-04 2006-05-26 Micron Technology Inc Method and apparatus for flip-chip packaging providing testing capability
SG115459A1 (en) 2002-03-04 2005-10-28 Micron Technology Inc Flip chip packaging using recessed interposer terminals
US20040036170A1 (en) * 2002-08-20 2004-02-26 Lee Teck Kheng Double bumping of flexible substrate for first and second level interconnects
TW200507218A (en) * 2003-03-31 2005-02-16 North Corp Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module
WO2004113935A2 (en) * 2003-06-20 2004-12-29 The Trustees Of Dartmouth College Test fixture for impedance measurements
US7692287B2 (en) * 2004-05-21 2010-04-06 Nec Corporation Semiconductor device and wiring board
US7416923B2 (en) * 2005-12-09 2008-08-26 International Business Machines Corporation Underfill film having thermally conductive sheet
US20080061448A1 (en) * 2006-09-12 2008-03-13 International Business Machines Corporation System and method for thermal expansion pre-compensated package substrate
EP1903834A1 (de) * 2006-09-22 2008-03-26 Siemens Audiologische Technik GmbH Hörvorrichtung mit Magnetfeldsensor und Schaltkreismontageverfahren
US7926173B2 (en) * 2007-07-05 2011-04-19 Occam Portfolio Llc Method of making a circuit assembly
US20090152659A1 (en) * 2007-12-18 2009-06-18 Jari Hiltunen Reflowable camera module with improved reliability of solder connections
JP2009302427A (ja) * 2008-06-17 2009-12-24 Shinko Electric Ind Co Ltd 半導体装置および半導体装置の製造方法
US10251273B2 (en) * 2008-09-08 2019-04-02 Intel Corporation Mainboard assembly including a package overlying a die directly attached to the mainboard
KR101009103B1 (ko) * 2008-10-27 2011-01-18 삼성전기주식회사 양면 전극 패키지 및 그 제조방법
US8278749B2 (en) * 2009-01-30 2012-10-02 Infineon Technologies Ag Integrated antennas in wafer level package
US9070662B2 (en) * 2009-03-05 2015-06-30 Volterra Semiconductor Corporation Chip-scale packaging with protective heat spreader
KR101044135B1 (ko) * 2009-11-30 2011-06-28 삼성전기주식회사 인쇄회로기판의 제조방법
JP5533350B2 (ja) * 2010-06-30 2014-06-25 株式会社デンソー 半導体装置及びその製造方法
US9560771B2 (en) 2012-11-27 2017-01-31 Omnivision Technologies, Inc. Ball grid array and land grid array having modified footprint
US9520378B2 (en) * 2012-12-21 2016-12-13 Intel Corporation Thermal matched composite die
US20160005679A1 (en) * 2014-07-02 2016-01-07 Nxp B.V. Exposed die quad flat no-leads (qfn) package
US9385060B1 (en) * 2014-07-25 2016-07-05 Altera Corporation Integrated circuit package with enhanced thermal conduction
US10236245B2 (en) * 2016-03-23 2019-03-19 Dyi-chung Hu Package substrate with embedded circuit
US20170287838A1 (en) 2016-04-02 2017-10-05 Intel Corporation Electrical interconnect bridge
US11348897B2 (en) 2017-12-29 2022-05-31 Intel Corporation Microelectronic assemblies
DE112017008325T5 (de) * 2017-12-29 2020-09-03 Intel Corporation Mikroelektronische anordnungen
US10879144B2 (en) 2018-08-14 2020-12-29 Texas Instruments Incorporated Semiconductor package with multilayer mold
CN111435653A (zh) * 2019-01-15 2020-07-21 陈石矶 简易型电路板与芯片的封装结构

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970000416B1 (ko) 1985-05-31 1997-01-09 사이언티픽 이매징 테크놀로지시 이코포레이티드 규소웨이퍼 보강재 및 보강방법
US5160560A (en) * 1988-06-02 1992-11-03 Hughes Aircraft Company Method of producing optically flat surfaces on processed silicon wafers
JP2595719B2 (ja) 1989-06-26 1997-04-02 いすゞ自動車株式会社 Ｏｈｃ型動弁機構装置
US5308980A (en) * 1991-02-20 1994-05-03 Amber Engineering, Inc. Thermal mismatch accommodated infrared detector hybrid array
JP3114759B2 (ja) * 1992-03-13 2000-12-04 富士通株式会社 半導体装置
US5273940A (en) 1992-06-15 1993-12-28 Motorola, Inc. Multiple chip package with thinned semiconductor chips
JPH08335653A (ja) * 1995-04-07 1996-12-17 Nitto Denko Corp 半導体装置およびその製法並びに上記半導体装置の製造に用いる半導体装置用テープキャリア
US5627405A (en) * 1995-07-17 1997-05-06 National Semiconductor Corporation Integrated circuit assembly incorporating an anisotropic elecctrically conductive layer
JPH09306954A (ja) * 1996-05-20 1997-11-28 Hitachi Ltd 半導体装置及びその実装方法並びに実装構造体
US5726079A (en) * 1996-06-19 1998-03-10 International Business Machines Corporation Thermally enhanced flip chip package and method of forming
JP3184493B2 (ja) * 1997-10-01 2001-07-09 松下電子工業株式会社 電子装置の製造方法
US6107109A (en) * 1997-12-18 2000-08-22 Micron Technology, Inc. Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate
US6620731B1 (en) * 1997-12-18 2003-09-16 Micron Technology, Inc. Method for fabricating semiconductor components and interconnects with contacts on opposing sides
US6023094A (en) 1998-01-14 2000-02-08 National Semiconductor Corporation Semiconductor wafer having a bottom surface protective coating
JP2000208698A (ja) * 1999-01-18 2000-07-28 Toshiba Corp 半導体装置
US6137164A (en) * 1998-03-16 2000-10-24 Texas Instruments Incorporated Thin stacked integrated circuit device
JP3410371B2 (ja) * 1998-08-18 2003-05-26 リンテック株式会社 ウエハ裏面研削時の表面保護シートおよびその利用方法
US6317331B1 (en) 1998-08-19 2001-11-13 Kulicke & Soffa Holdings, Inc. Wiring substrate with thermal insert
JP3816253B2 (ja) * 1999-01-19 2006-08-30 富士通株式会社 半導体装置の製造方法
EP1484790A1 (de) * 2001-12-25 2004-12-08 Hitachi, Ltd. Halbleiterbauelement und verfahren zu seiner herstellung

Also Published As

Publication number Publication date
EP1134804B1 (de) 2012-02-22
EP1134804A3 (de) 2003-08-06
US20050140025A1 (en) 2005-06-30
JP2001291801A (ja) 2001-10-19
US6900534B2 (en) 2005-05-31
US20010048157A1 (en) 2001-12-06
EP1134804A2 (de) 2001-09-19

Similar Documents

Publication Publication Date Title
ATE546834T1 (de) Thermisch verbesserter halbleiterträger
BR8903415A (pt) Pacote eletronico
WO2005018291A3 (en) Thermally enhanced electronic module with self-aligning heat sink
EP1189280A4 (de) Halbleiter
WO2007136941A3 (en) Flip chip mlp with folded heat sink
KR960006721A (ko) 칩을 흡열부에 직접 결합하기 위한 방법 및 장치
EP0350588A3 (de) Elektronische Packung mit verbesserter Wärmesenke
GB2411307B (en) Image sensor module and camera module package including the same
EP0883175A3 (de) Kühler höherer Leistung für Flipchippackungen
TW360959B (en) Electronic package with compressible heatsink structure
DE60042110D1 (de) Kunststoffeingekapselte Leistungshalbleiteranordnung einschliesslich einem Substrat mit allen darauf montierten elektronischen Bauteilen für eine Kontrollschaltung
MY139067A (en) High performance chip packaging method
EP1394734A4 (de) Chipkarte
EP0896501A3 (de) Montagestruktur für eine oder mehrere Halbleiteranordnungen
KR970018463A (ko) 범프, 범프를 갖는 반도체 칩 및 패키지 그리고 실장 방법 및 반도체 장치
TW336340B (en) Flexible thin film ball grid array containing solder mask
KR970023907A (ko) 반도체 장치
EP1458024A3 (de) Zwischenstück und Halbleiteranordnung
WO2004071140A3 (en) Underfill film for printed wiring assemblies
US6560108B2 (en) Chip scale packaging on CTE matched printed wiring boards
SG128546A1 (en) Low cte substrates for use with low-k flip-chip package devices
KR950009998A (ko) 반도체 장치
TW200929462A (en) Chip, chip manufacturing method, and chip packaging structure
US5565675A (en) Mechanically mounted optical receiver assembly
Johnson et al. Patterned adhesive flip chip technology for assembly on polyimide flex substrates