ATE549748T1 - Verfahren zur herstellung eines dual-gate fet - Google Patents
Verfahren zur herstellung eines dual-gate fetInfo
- Publication number
- ATE549748T1 ATE549748T1 AT06710721T AT06710721T ATE549748T1 AT E549748 T1 ATE549748 T1 AT E549748T1 AT 06710721 T AT06710721 T AT 06710721T AT 06710721 T AT06710721 T AT 06710721T AT E549748 T1 ATE549748 T1 AT E549748T1
- Authority
- AT
- Austria
- Prior art keywords
- dual
- layer
- gate fet
- protrusion
- gate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6212—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections
- H10D30/6213—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections having rounded corners
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Junction Field-Effect Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP05100571 | 2005-01-28 | ||
| PCT/IB2006/050238 WO2006079964A2 (en) | 2005-01-28 | 2006-01-23 | Method of fabricating a dual-gate fet |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE549748T1 true ATE549748T1 (de) | 2012-03-15 |
Family
ID=36570476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT06710721T ATE549748T1 (de) | 2005-01-28 | 2006-01-23 | Verfahren zur herstellung eines dual-gate fet |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7741182B2 (de) |
| EP (1) | EP1844498B1 (de) |
| JP (1) | JP2008529295A (de) |
| KR (1) | KR20070099671A (de) |
| CN (1) | CN100583452C (de) |
| AT (1) | ATE549748T1 (de) |
| TW (1) | TW200711000A (de) |
| WO (1) | WO2006079964A2 (de) |
Families Citing this family (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100573835C (zh) * | 2006-11-01 | 2009-12-23 | 中国科学院半导体研究所 | 一种制作纵向双栅金属-氧化物-半导体器件的方法 |
| FR2910999B1 (fr) * | 2006-12-28 | 2009-04-03 | Commissariat Energie Atomique | Cellule memoire dotee de transistors double-grille, a grilles independantes et asymetriques |
| US8288756B2 (en) * | 2007-11-30 | 2012-10-16 | Advanced Micro Devices, Inc. | Hetero-structured, inverted-T field effect transistor |
| US8507337B2 (en) | 2008-07-06 | 2013-08-13 | Imec | Method for doping semiconductor structures and the semiconductor device thereof |
| CN103107088B (zh) * | 2011-11-11 | 2016-06-01 | 中芯国际集成电路制造(上海)有限公司 | 具有周围栅极结构的鳍型场效应晶体管及其制造方法 |
| CN103295900B (zh) * | 2012-03-02 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | 形成鳍部及鳍式场效应晶体管的方法 |
| US8987790B2 (en) | 2012-11-26 | 2015-03-24 | International Business Machines Corporation | Fin isolation in multi-gate field effect transistors |
| US9318606B2 (en) | 2013-01-14 | 2016-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET device and method of fabricating same |
| US9147682B2 (en) | 2013-01-14 | 2015-09-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin spacer protected source and drain regions in FinFETs |
| KR102220806B1 (ko) * | 2013-06-20 | 2021-02-26 | 인텔 코포레이션 | 도핑된 서브-핀 영역을 갖는 비평면 반도체 디바이스 및 그 제조 방법 |
| US10468528B2 (en) | 2014-04-16 | 2019-11-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET device with high-k metal gate stack |
| US9178067B1 (en) | 2014-04-25 | 2015-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for FinFET device |
| US9721955B2 (en) | 2014-04-25 | 2017-08-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for SRAM FinFET device having an oxide feature |
| US9224736B1 (en) | 2014-06-27 | 2015-12-29 | Taiwan Semicondcutor Manufacturing Company, Ltd. | Structure and method for SRAM FinFET device |
| US9263555B2 (en) * | 2014-07-03 | 2016-02-16 | Globalfoundries Inc. | Methods of forming a channel region for a semiconductor device by performing a triple cladding process |
| CN105514163B (zh) * | 2014-09-26 | 2018-09-07 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管及其形成方法 |
| CN105870014B (zh) * | 2015-01-19 | 2019-06-14 | 中国科学院微电子研究所 | 一种鳍的形成方法 |
| CN105990172B (zh) * | 2015-01-30 | 2018-07-31 | 上海华力微电子有限公司 | 嵌入式SiGe外延测试块的设计 |
| TWI595650B (zh) * | 2015-05-21 | 2017-08-11 | 蘇烱光 | 適應性雙閘極金氧半場效電晶體 |
| CN104934480B (zh) * | 2015-06-30 | 2017-11-24 | 上海华力微电子有限公司 | 鳍式场效应晶体管结构及其制作方法 |
| CN105047717A (zh) * | 2015-06-30 | 2015-11-11 | 上海华力微电子有限公司 | 鳍式场效应晶体管结构及其制作方法 |
| CA3031736A1 (en) | 2015-07-29 | 2017-02-02 | Circuit Seed, Llc | Complementary current field-effect transistor devices and amplifiers |
| CN108141181A (zh) | 2015-07-30 | 2018-06-08 | 电路种子有限责任公司 | 多级式且前馈补偿的互补电流场效应晶体管放大器 |
| US10514716B2 (en) | 2015-07-30 | 2019-12-24 | Circuit Seed, Llc | Reference generator and current source transistor based on complementary current field-effect transistor devices |
| US10476457B2 (en) | 2015-07-30 | 2019-11-12 | Circuit Seed, Llc | Low noise trans-impedance amplifiers based on complementary current field-effect transistor devices |
| US9818873B2 (en) * | 2015-10-09 | 2017-11-14 | Globalfoundries Inc. | Forming stressed epitaxial layers between gates separated by different pitches |
| WO2017105554A1 (en) | 2015-12-14 | 2017-06-22 | Circuit Seed, Llc | Super-saturation current field effect transistor and trans-impedance mos device |
| CN106057678B (zh) * | 2016-06-17 | 2019-07-30 | 中国科学院微电子研究所 | 基于外延层的半导体器件及其制造方法及包括其的电子设备 |
| US10014303B2 (en) * | 2016-08-26 | 2018-07-03 | Globalfoundries Inc. | Devices with contact-to-gate shorting through conductive paths between fins and fabrication methods |
| FR3114686B1 (fr) * | 2020-09-30 | 2023-03-31 | St Microelectronics Rousset | Transistor MOS à triple grille et procédé de fabrication d’un tel transistor |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1091413A3 (de) | 1999-10-06 | 2005-01-12 | Lsi Logic Corporation | Vollständig verarmter und invertierter CMOSFET mit vertikalem Kanal und dualem Gate |
| JP2002151688A (ja) * | 2000-08-28 | 2002-05-24 | Mitsubishi Electric Corp | Ｍｏｓ型半導体装置およびその製造方法 |
| US7163864B1 (en) * | 2000-10-18 | 2007-01-16 | International Business Machines Corporation | Method of fabricating semiconductor side wall fin |
| US6716684B1 (en) * | 2000-11-13 | 2004-04-06 | Advanced Micro Devices, Inc. | Method of making a self-aligned triple gate silicon-on-insulator device |
| US6630388B2 (en) * | 2001-03-13 | 2003-10-07 | National Institute Of Advanced Industrial Science And Technology | Double-gate field-effect transistor, integrated circuit using the transistor and method of manufacturing the same |
| US6818952B2 (en) | 2002-10-01 | 2004-11-16 | International Business Machines Corporation | Damascene gate multi-mesa MOSFET |
| US7259425B2 (en) * | 2003-01-23 | 2007-08-21 | Advanced Micro Devices, Inc. | Tri-gate and gate around MOSFET devices and methods for making same |
| US6815738B2 (en) * | 2003-02-28 | 2004-11-09 | International Business Machines Corporation | Multiple gate MOSFET structure with strained Si Fin body |
| US7087506B2 (en) * | 2003-06-26 | 2006-08-08 | International Business Machines Corporation | Method of forming freestanding semiconductor layer |
| US7078299B2 (en) * | 2003-09-03 | 2006-07-18 | Advanced Micro Devices, Inc. | Formation of finFET using a sidewall epitaxial layer |
| KR100578130B1 (ko) | 2003-10-14 | 2006-05-10 | 삼성전자주식회사 | 핀 전계효과 트랜지스터를 위한 다중 실리콘 핀 및 그형성 방법 |
-
2006
- 2006-01-23 US US11/815,100 patent/US7741182B2/en not_active Expired - Lifetime
- 2006-01-23 WO PCT/IB2006/050238 patent/WO2006079964A2/en not_active Ceased
- 2006-01-23 EP EP06710721A patent/EP1844498B1/de not_active Expired - Lifetime
- 2006-01-23 KR KR1020077019612A patent/KR20070099671A/ko not_active Withdrawn
- 2006-01-23 JP JP2007552775A patent/JP2008529295A/ja not_active Withdrawn
- 2006-01-23 CN CN200680003375A patent/CN100583452C/zh not_active Expired - Fee Related
- 2006-01-23 AT AT06710721T patent/ATE549748T1/de active
- 2006-01-25 TW TW095102863A patent/TW200711000A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP1844498B1 (de) | 2012-03-14 |
| WO2006079964A3 (en) | 2006-11-02 |
| CN101142686A (zh) | 2008-03-12 |
| EP1844498A2 (de) | 2007-10-17 |
| US7741182B2 (en) | 2010-06-22 |
| TW200711000A (en) | 2007-03-16 |
| JP2008529295A (ja) | 2008-07-31 |
| WO2006079964A2 (en) | 2006-08-03 |
| US20080318375A1 (en) | 2008-12-25 |
| KR20070099671A (ko) | 2007-10-09 |
| CN100583452C (zh) | 2010-01-20 |
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