ATE77705T1 - DATA TRANSMISSION SYSTEM. - Google Patents

DATA TRANSMISSION SYSTEM.

Info

Publication number
ATE77705T1
ATE77705T1 AT84305031T AT84305031T ATE77705T1 AT E77705 T1 ATE77705 T1 AT E77705T1 AT 84305031 T AT84305031 T AT 84305031T AT 84305031 T AT84305031 T AT 84305031T AT E77705 T1 ATE77705 T1 AT E77705T1
Authority
AT
Austria
Prior art keywords
processor
data transmission
transmission system
memory access
direct memory
Prior art date
Application number
AT84305031T
Other languages
German (de)
Inventor
Randol Robert Read
Everett Lee Cox
Randall Leon Selzler
Original Assignee
Amoco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amoco Corp filed Critical Amoco Corp
Application granted granted Critical
Publication of ATE77705T1 publication Critical patent/ATE77705T1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0613—Improving I/O performance in relation to throughput
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0682—Tape device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0662—Virtualisation aspects
    • G06F3/0664—Virtualisation aspects at device level, e.g. emulation of a storage device or system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Complex Calculations (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Dc Digital Transmission (AREA)
  • Enzymes And Modification Thereof (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Vehicle Body Suspensions (AREA)
  • Stereophonic System (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Control By Computers (AREA)
  • Communication Control (AREA)
  • Micro-Organisms Or Cultivation Processes Thereof (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

@ A data transfer system for a computer system which includes at least one processor (12), a memory (14) coupled to the processor (12), and two direct memory access selector channels (40,46). A hardware interconnection (48) is provided between the two selector channels (40,46) such thatthey can be used to transfer data from one portion of the memory system (14) to another directly, using direct memory access techniques, without intermediate mass storage. The disclosed software provides a transfer system which mimics the use of magnetic tapes in many respects in order to simplify use of the system.
AT84305031T 1983-07-29 1984-07-24 DATA TRANSMISSION SYSTEM. ATE77705T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/518,518 US4620279A (en) 1983-07-29 1983-07-29 Data transfer system
EP84305031A EP0133015B1 (en) 1983-07-29 1984-07-24 Data transfer system

Publications (1)

Publication Number Publication Date
ATE77705T1 true ATE77705T1 (en) 1992-07-15

Family

ID=24064273

Family Applications (1)

Application Number Title Priority Date Filing Date
AT84305031T ATE77705T1 (en) 1983-07-29 1984-07-24 DATA TRANSMISSION SYSTEM.

Country Status (8)

Country Link
US (1) US4620279A (en)
EP (1) EP0133015B1 (en)
JP (1) JPS6054063A (en)
AT (1) ATE77705T1 (en)
AU (1) AU570701B2 (en)
CA (1) CA1218451A (en)
DE (1) DE3485784D1 (en)
NO (1) NO166430C (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59100964A (en) * 1982-12-01 1984-06-11 Hitachi Ltd Parallel transfer type director device
US4620279A (en) * 1983-07-29 1986-10-28 Standard Oil Company, Now Amoco Corporation Data transfer system
US4764896A (en) * 1985-07-01 1988-08-16 Honeywell Inc. Microprocessor assisted memory to memory move apparatus
US4987530A (en) * 1985-11-15 1991-01-22 Data General Corp. Input/output controller for a data processing system
US5109492A (en) * 1986-09-19 1992-04-28 Hitachi, Ltd. Microprocessor which terminates bus cycle when access address falls within a predetermined processor system address space
DE3887544T2 (en) * 1987-03-09 1994-06-01 Procter & Gamble Beta-aminoethyl-substituted phenyl compounds, anti-inflammatory or analgesic compositions containing them.
US4980846A (en) * 1988-04-07 1990-12-25 Impact Systems, Inc. Process and apparatus for controlling on-line a parameter of a moving sheet
US5420981A (en) * 1989-09-29 1995-05-30 At&T Corp. Arrangement for establishing a data pipeline in a data processing system employing multiple processors
US5175825A (en) * 1990-02-02 1992-12-29 Auspex Systems, Inc. High speed, flexible source/destination data burst direct memory access controller
JP4058118B2 (en) * 1994-11-15 2008-03-05 株式会社日立製作所 Program generation system and method
US5901331A (en) * 1995-01-31 1999-05-04 Sep Elektronik Gmbh Method for continuous data safeguarding on a magnetic tape and data restoring therefrom
US6131141A (en) * 1996-11-15 2000-10-10 Intelligent Computer Solutions, Inc. Method of and portable apparatus for determining and utilizing timing parameters for direct duplication of hard disk drives
US6145075A (en) * 1998-02-06 2000-11-07 Ip-First, L.L.C. Apparatus and method for executing a single-cycle exchange instruction to exchange contents of two locations in a register file
US6233628B1 (en) * 1999-01-08 2001-05-15 Oak Technology, Inc. System and method for transferring data using separate pipes for command and data
US6295208B1 (en) 1999-02-12 2001-09-25 3Com Corporation Backplate for securing a circuit card to a computer chassis
EP1811394B1 (en) * 2004-10-28 2012-01-18 Magima Digital Information Co., Ltd. An arbitrator and its arbitration method
US9075795B2 (en) * 2012-11-21 2015-07-07 Red Hat Israel, Ltd. Interprocess communication
US10469405B2 (en) * 2016-06-29 2019-11-05 Amazon Technologies, Inc. Network-accessible data volume modification

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3686641A (en) * 1970-09-30 1972-08-22 Burroughs Corp Multiprogram digital processing system with interprogram communication
US4149242A (en) * 1977-05-06 1979-04-10 Bell Telephone Laboratories, Incorporated Data interface apparatus for multiple sequential processors
US4470115A (en) * 1982-03-12 1984-09-04 Bell Telephone Laboratories Incorporated Input/output method
US4620279A (en) * 1983-07-29 1986-10-28 Standard Oil Company, Now Amoco Corporation Data transfer system

Also Published As

Publication number Publication date
NO166430C (en) 1991-07-17
NO843056L (en) 1985-01-30
EP0133015B1 (en) 1992-06-24
CA1218451A (en) 1987-02-24
DE3485784D1 (en) 1992-07-30
EP0133015A3 (en) 1988-07-27
JPS6054063A (en) 1985-03-28
US4620279A (en) 1986-10-28
NO166430B (en) 1991-04-08
EP0133015A2 (en) 1985-02-13
AU570701B2 (en) 1988-03-24
AU3058484A (en) 1985-01-31

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties