AU2003201701A1 - Low-power bus interface - Google Patents

Low-power bus interface

Info

Publication number
AU2003201701A1
AU2003201701A1 AU2003201701A AU2003201701A AU2003201701A1 AU 2003201701 A1 AU2003201701 A1 AU 2003201701A1 AU 2003201701 A AU2003201701 A AU 2003201701A AU 2003201701 A AU2003201701 A AU 2003201701A AU 2003201701 A1 AU2003201701 A1 AU 2003201701A1
Authority
AU
Australia
Prior art keywords
target
data
bus
initiator
interfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003201701A
Other languages
English (en)
Inventor
Rune H. Jensen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of AU2003201701A1 publication Critical patent/AU2003201701A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3253—Power saving in bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Power Sources (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Dc Digital Transmission (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Logic Circuits (AREA)
AU2003201701A 2002-01-17 2003-01-15 Low-power bus interface Abandoned AU2003201701A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/052,277 US20030135676A1 (en) 2002-01-17 2002-01-17 Low-power bus interface
US10/052,277 2002-01-17
PCT/IB2003/000088 WO2003060736A1 (en) 2002-01-17 2003-01-15 Low-power bus interface

Publications (1)

Publication Number Publication Date
AU2003201701A1 true AU2003201701A1 (en) 2003-07-30

Family

ID=21976540

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003201701A Abandoned AU2003201701A1 (en) 2002-01-17 2003-01-15 Low-power bus interface

Country Status (9)

Country Link
US (1) US20030135676A1 (de)
EP (1) EP1472609B1 (de)
JP (1) JP2005515546A (de)
KR (1) KR20040076281A (de)
CN (1) CN1315071C (de)
AT (1) ATE347138T1 (de)
AU (1) AU2003201701A1 (de)
DE (1) DE60310031T2 (de)
WO (1) WO2003060736A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7194655B2 (en) * 2003-06-12 2007-03-20 International Business Machines Corporation Method and system for autonomously rebuilding a failed server and a computer system utilizing the same
KR100591524B1 (ko) * 2004-05-14 2006-06-19 삼성전자주식회사 버스 구조하에서 다이나믹 클록 게이팅이 가능한 슬레이브장치 및 그 동작방법
US7313646B2 (en) * 2004-06-03 2007-12-25 Stmicroelectronics S.A. Interfacing of functional modules in an on-chip system
US7386661B2 (en) * 2004-10-13 2008-06-10 Marvell International Ltd. Power save module for storage controllers
JP4652861B2 (ja) * 2005-03-23 2011-03-16 三菱電機株式会社 半導体装置
CN103116565A (zh) * 2005-04-21 2013-05-22 提琴存储器公司 可配置的开关原件、互连网络及布局网络间相互连接方法
US7647515B2 (en) * 2005-08-29 2010-01-12 Dell Products L.P. System and method for information handling system adaptive variable bus idle timer
DE102006004346A1 (de) * 2006-01-30 2007-10-18 Deutsche Thomson-Brandt Gmbh Datenbusschnittstelle mit abschaltbarem Takt
JP5160100B2 (ja) * 2007-02-08 2013-03-13 シャープ株式会社 データ通信誤動作防止装置、電子機器、データ通信誤動作防止装置の制御方法、データ通信誤動作防止装置の制御プログラム、及び当該プログラムを記録した記録媒体
US7984314B2 (en) 2007-05-14 2011-07-19 Intel Corporation Power management of low power link states
US9146892B2 (en) * 2007-10-11 2015-09-29 Broadcom Corporation Method and system for improving PCI-E L1 ASPM exit latency
US8090967B2 (en) * 2008-05-23 2012-01-03 Intel Corporation Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delay
JP5244759B2 (ja) * 2009-10-05 2013-07-24 京セラドキュメントソリューションズ株式会社 情報処理装置および画像形成装置
JP2011081551A (ja) * 2009-10-06 2011-04-21 Panasonic Corp データ処理システム
US9285860B2 (en) 2010-05-03 2016-03-15 Qualcomm Incorporated Apparatus and methods employing variable clock gating hysteresis for a communications port
KR101842245B1 (ko) 2011-07-25 2018-03-26 삼성전자주식회사 시스템 온 칩 버스 장치 및 그에 따른 루트 클럭 게이팅 방법
CN103164367B (zh) * 2011-12-16 2016-02-17 扬智科技股份有限公司 信号传输线的阻抗匹配的控制装置和控制方法
JP6774160B2 (ja) * 2013-12-06 2020-10-21 キヤノン株式会社 情報処理装置、並びに、データ転送装置の制御方法
CA3077838C (en) * 2020-04-03 2024-06-04 Telus Communications Inc. System and method for managing visitor location register (vlr) records by removing duplicate records

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396635A (en) * 1990-06-01 1995-03-07 Vadem Corporation Power conservation apparatus having multiple power reduction levels dependent upon the activity of the computer system
US5546591A (en) * 1991-12-20 1996-08-13 Vlsi Technology, Inc. Distributed power management system for battery operated personal computers
EP0621526A1 (de) * 1993-04-21 1994-10-26 WaferScale Integration Inc. Verfahren und Anordnung zum Einschalten und Ausschalten peripher Einheiten
US5517650A (en) * 1994-12-19 1996-05-14 International Business Machines Corporation Bridge for a power managed computer system with multiple buses and system arbitration
US5692202A (en) * 1995-12-29 1997-11-25 Intel Corporation System, apparatus, and method for managing power in a computer system
US5987614A (en) * 1997-06-17 1999-11-16 Vadem Distributed power management system and method for computer
US6272667B1 (en) * 1997-10-09 2001-08-07 Kabushiki Kaisha Toshiba Method and apparatus for clock gated logic circuits to reduce electric power consumption
US6097241A (en) * 1998-07-21 2000-08-01 International Business Machines Corporation ASIC low power activity detector to change threshold voltage

Also Published As

Publication number Publication date
EP1472609A1 (de) 2004-11-03
JP2005515546A (ja) 2005-05-26
US20030135676A1 (en) 2003-07-17
DE60310031D1 (de) 2007-01-11
ATE347138T1 (de) 2006-12-15
DE60310031T2 (de) 2007-06-21
WO2003060736A1 (en) 2003-07-24
KR20040076281A (ko) 2004-08-31
CN1315071C (zh) 2007-05-09
EP1472609B1 (de) 2006-11-29
CN1615475A (zh) 2005-05-11

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase