BE1003383A6 - Dispositif de saisie pour essayer un ordinateur. - Google Patents

Dispositif de saisie pour essayer un ordinateur. Download PDF

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Publication number
BE1003383A6
BE1003383A6 BE9101049A BE9101049A BE1003383A6 BE 1003383 A6 BE1003383 A6 BE 1003383A6 BE 9101049 A BE9101049 A BE 9101049A BE 9101049 A BE9101049 A BE 9101049A BE 1003383 A6 BE1003383 A6 BE 1003383A6
Authority
BE
Belgium
Prior art keywords
testing
computer
circuit
target
input device
Prior art date
Application number
BE9101049A
Other languages
English (en)
Inventor
John Gerard Curran
Edward Joseph Edmonds
Original Assignee
Elverex Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elverex Ltd filed Critical Elverex Ltd
Application granted granted Critical
Publication of BE1003383A6 publication Critical patent/BE1003383A6/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3485—Performance evaluation by tracing or monitoring for I/O devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

On décrit un dispositif de saisie (1) à utiliser pour essayer un ordinateur cible (7). Un circuit de saisie d'écran (2) comprend un circuit de décodage (18) qui lit les signaux de contrôle de pixels transmis à un écran cible (17) pour produire des bytes en vue de leur mise en mémoire dans une mémoire de saisie (19) et des signaux de contrôle pour un circuit indicateur de mémoire (20). Ceci permet de surveiller ce qui est réellement affiché sur un écran cible (17) plutôt que ce qui est transmis à la mémoire de l'écran cible (15). Le dispositif (1) comprend également un circuit de saisie sériel (3) qui effectue la surveillance et/ou la simulation des signaux sériels transmis ou reçus pour l'ordinateur cible (7).
BE9101049A 1990-11-14 1991-11-14 Dispositif de saisie pour essayer un ordinateur. BE1003383A6 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IE410290A IE904102A1 (en) 1990-11-14 1990-11-14 A screen capture circuit

Publications (1)

Publication Number Publication Date
BE1003383A6 true BE1003383A6 (fr) 1992-03-10

Family

ID=11039334

Family Applications (1)

Application Number Title Priority Date Filing Date
BE9101049A BE1003383A6 (fr) 1990-11-14 1991-11-14 Dispositif de saisie pour essayer un ordinateur.

Country Status (3)

Country Link
BE (1) BE1003383A6 (fr)
GB (1) GB2250112B (fr)
IE (1) IE904102A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0573686A1 (fr) * 1992-06-10 1993-12-15 B.O.S. SOFTWARE GmbH Procédé d'enregistrement de l'état d'un système d'ordinateur
US5825786A (en) * 1993-07-22 1998-10-20 Texas Instruments Incorporated Undersampling digital testability circuit
US6108637A (en) * 1996-09-03 2000-08-22 Nielsen Media Research, Inc. Content display monitor
GB9818872D0 (en) 1998-08-28 1998-10-21 Green Cathedral Limited Computer network information use monitoring

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IE60444B1 (en) * 1988-03-30 1994-07-13 Elverex Ltd A software verification apparatus

Also Published As

Publication number Publication date
GB2250112B (en) 1994-06-01
GB9124188D0 (en) 1992-01-08
IE904102A1 (en) 1992-05-20
GB2250112A (en) 1992-05-27

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: ELVEREX LTD

Effective date: 19941130