Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H9/00—Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
  • H03H9/02—Details
  • H03H9/02535—Details of surface acoustic wave devices
  • H03H9/02818—Means for compensation or elimination of undesirable effects
  • H03H9/02913—Measures for shielding against electromagnetic fields
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H11/00—Networks using active elements
  • H03H11/02—Multiple-port networks
  • H03H11/04—Frequency selective two-port networks
  • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
  • H03H11/1291—Current or voltage controlled filters
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H9/00—Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
  • H03H9/02—Details
  • H03H9/02535—Details of surface acoustic wave devices
  • H03H9/0296—Surface acoustic wave [SAW] devices having both acoustic and non-acoustic properties
  • H03H9/02976—Surface acoustic wave [SAW] devices having both acoustic and non-acoustic properties with semiconductor devices
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
  • H10W20/497—Inductive arrangements or effects of, or between, wiring layers

Landscapes

• Physics & Mathematics (AREA)
• Acoustics & Sound (AREA)
• Electromagnetism (AREA)
• Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
• Networks Using Active Elements (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=26251512

Family Applications (1)

Country Status (8)

Families Citing this family (2)

• 1968
  • 1968-04-02 GB GB05737/68A patent/GB1244652A/en not_active Expired
• 1969
  • 1969-04-01 CH CH499169A patent/CH513552A/de not_active IP Right Cessation
  • 1969-04-01 NL NL6905002A patent/NL6905002A/xx unknown
  • 1969-04-02 AT AT325969A patent/AT308198B/de not_active IP Right Cessation
  • 1969-04-02 BE BE730957D patent/BE730957A/xx not_active IP Right Cessation
  • 1969-04-02 FR FR6910142A patent/FR2007369A1/fr not_active Withdrawn
  • 1969-04-02 DE DE1917133A patent/DE1917133C3/de not_active Expired
  • 1969-04-02 CA CA047580A patent/CA938734A/en not_active Expired

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