BE834068A - Systeme de traitement de donnees a interface vitesse rapide/vitesse lente - Google Patents

Systeme de traitement de donnees a interface vitesse rapide/vitesse lente

Info

Publication number
BE834068A
BE834068A BE160584A BE160584A BE834068A BE 834068 A BE834068 A BE 834068A BE 160584 A BE160584 A BE 160584A BE 160584 A BE160584 A BE 160584A BE 834068 A BE834068 A BE 834068A
Authority
BE
Belgium
Prior art keywords
data processing
processing system
interface data
low speed
fast
Prior art date
Application number
BE160584A
Other languages
English (en)
Inventor
G Bredart
A Gilot
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE834068A publication Critical patent/BE834068A/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
BE160584A 1974-10-17 1975-10-01 Systeme de traitement de donnees a interface vitesse rapide/vitesse lente BE834068A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/515,693 US3980993A (en) 1974-10-17 1974-10-17 High-speed/low-speed interface for data processing systems

Publications (1)

Publication Number Publication Date
BE834068A true BE834068A (fr) 1976-02-02

Family

ID=24052361

Family Applications (1)

Application Number Title Priority Date Filing Date
BE160584A BE834068A (fr) 1974-10-17 1975-10-01 Systeme de traitement de donnees a interface vitesse rapide/vitesse lente

Country Status (2)

Country Link
US (1) US3980993A (fr)
BE (1) BE834068A (fr)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1561961A (en) * 1977-04-20 1980-03-05 Int Computers Ltd Data processing units
US4143418A (en) * 1977-09-21 1979-03-06 Sperry Rand Corporation Control device and method for reading a data character from a computer at a fast rate and transmitting the character at a slow rate on a communication line
US4344132A (en) * 1979-12-14 1982-08-10 International Business Machines Corporation Serial storage interface apparatus for coupling a serial storage mechanism to a data processor input/output bus
US4683551A (en) * 1984-03-28 1987-07-28 Minnesota Mining And Manufacturing Company Ram clock switching circuitry for a laser beam printer
JPS617967A (ja) * 1984-06-15 1986-01-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Ｉ／ｏコントロ−ラ
JPS6243703A (ja) * 1985-08-21 1987-02-25 Fanuc Ltd 数値制御システム
JPH06105927B2 (ja) * 1986-12-19 1994-12-21 株式会社日立製作所 デ−タ転送速度可変制御方式
US5261082A (en) * 1987-11-20 1993-11-09 Hitachi, Ltd. Semiconductor integrated circuit having a plurality of oscillation circuits
US5197126A (en) * 1988-09-15 1993-03-23 Silicon Graphics, Inc. Clock switching circuit for asynchronous clocks of graphics generation apparatus
JPH07122868B2 (ja) * 1988-11-29 1995-12-25 日本電気株式会社 情報処理装置
US4958309A (en) * 1989-01-30 1990-09-18 Nrc Corporation Apparatus and method for changing frequencies
US5440749A (en) * 1989-08-03 1995-08-08 Nanotronics Corporation High performance, low cost microprocessor architecture
US5077686A (en) * 1990-01-31 1991-12-31 Stardent Computer Clock generator for a computer system
US5058054A (en) * 1990-02-06 1991-10-15 Analogic Corporation Data transmission device for interfacing between a first rate data acquisition system and a second rate data processing system
GB9210414D0 (en) * 1992-05-15 1992-07-01 Texas Instruments Ltd Method and apparatus for interfacing a serial data signal
ES2070557T3 (es) * 1992-07-03 1995-06-01 Siemens Nixdorf Inf Syst Sistema de proceso de datos con varias frecuencias de impulsos de reloj.
US5442754A (en) * 1992-12-04 1995-08-15 Unisys Corporation Receiving control logic system for dual bus network
US5559967A (en) * 1993-03-18 1996-09-24 Apple Computer, Inc. Method and apparatus for a dynamic, multi-speed bus architecture in which an exchange of speed messages occurs independent of the data signal transfers
US5913075A (en) * 1997-03-25 1999-06-15 International Business Machines Corporation High speed communication between high cycle rate electronic devices using a low cycle rate bus
US6101561A (en) * 1998-02-06 2000-08-08 International Business Machines Corporation System for providing an increase in digital data transmission rate over a parallel bus by converting binary format voltages to encoded analog format currents
US6081904A (en) * 1998-04-30 2000-06-27 International Business Machines Corporation Method for insuring data integrity during transfers
US6449655B1 (en) * 1999-01-08 2002-09-10 Cisco Technology, Inc. Method and apparatus for communication between network devices operating at different frequencies
US6321342B1 (en) * 1999-03-23 2001-11-20 Lsi Logic Corporation Method and apparatus for interfacing circuits that operate based upon different clock signals
DE10334838B4 (de) * 2003-07-30 2005-06-16 Infineon Technologies Ag Sende-/Empfangsanordnung und Verfahren zum bidirektionalen Übertragen von Daten über eine digitale Schnittstelle in einem Funkgerät
US7705445B2 (en) * 2005-02-11 2010-04-27 Rambus Inc. Semiconductor package with low and high-speed signal paths
JP2006294751A (ja) * 2005-04-07 2006-10-26 Toshiba Corp 半導体集積回路及びその製造方法
US7613265B2 (en) * 2006-09-05 2009-11-03 International Business Machines Corporation Systems, methods and computer program products for high speed data transfer using an external clock signal
US8098784B2 (en) * 2006-09-05 2012-01-17 International Business Machines Corporation Systems, methods and computer program products for high speed data transfer using a plurality of external clock signals

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3373418A (en) * 1964-09-14 1968-03-12 Rca Corp Bit buffering system
US3696338A (en) * 1970-08-20 1972-10-03 Tektronix Inc Data terminal-computer serial interface system having automatic baud rate switching
US3753236A (en) * 1972-03-31 1973-08-14 Honeywell Inf Systems Microprogrammable peripheral controller

Also Published As

Publication number Publication date
US3980993A (en) 1976-09-14

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: BURROUGHS CORP.

Effective date: 19901031