BR0013662A - Dispositivo de circuito elétrico/eletrônico - Google Patents

Dispositivo de circuito elétrico/eletrônico

Info

Publication number
BR0013662A
BR0013662A BR0013662-0A BR0013662A BR0013662A BR 0013662 A BR0013662 A BR 0013662A BR 0013662 A BR0013662 A BR 0013662A BR 0013662 A BR0013662 A BR 0013662A
Authority
BR
Brazil
Prior art keywords
read
flash memory
circuit
write
electronic circuit
Prior art date
Application number
BR0013662-0A
Other languages
English (en)
Inventor
Eiji Kawai
Original Assignee
Sony Computer Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Computer Entertainment Inc filed Critical Sony Computer Entertainment Inc
Publication of BR0013662A publication Critical patent/BR0013662A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Read Only Memory (AREA)
  • Storage Device Security (AREA)

Abstract

"DISPOSITIVO DE CIRCUITO ELéTRICO/ELETRôNICO". Trata-se de um circuito integrado, que desabilita a operação de escrita para um dispositivo de armazenamento por parte de um usuário quando uma corrente é feita passar através do mesmo. O circuito integrado (10C) possui uma memória flash (46) operando como um dispositivo de armazenamento no qual são possíveis operações de escrita/apagamento quando uma porta (R/W) de habilitação de leitura/escrita se encontra em nível lógico alto. Quando uma alimentação de energia (Vdd) é aplicada a um terminal externo (24) de entrada de alimentação de energia, um fusível (18) possuindo um padrão de interligação de polisilício é explodido após o período de tempo determinado pela saída de um circuito (16) regulador de escalonamento ascendente. Após o fusível (18) ter explodido, a entrada de um separador (20) é fixada num nível baixo através de um resistor (21), de tal forma que a porta (R/W) de habilitação de leitura/escrita da memória flash (46) como saída de um circuito AND (40) é fixada num nível baixo e a memória flash (46) torna-se uma memória somente de leitura.
BR0013662-0A 1999-08-31 2000-08-29 Dispositivo de circuito elétrico/eletrônico BR0013662A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP24593399 1999-08-31
PCT/JP2000/005835 WO2001016961A1 (en) 1999-08-31 2000-08-29 Electric/electronic circuit device

Publications (1)

Publication Number Publication Date
BR0013662A true BR0013662A (pt) 2002-05-14

Family

ID=17141028

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0013662-0A BR0013662A (pt) 1999-08-31 2000-08-29 Dispositivo de circuito elétrico/eletrônico

Country Status (10)

Country Link
US (1) US6518823B1 (pt)
EP (1) EP1212754B1 (pt)
KR (1) KR100798286B1 (pt)
CN (1) CN1371515A (pt)
AU (1) AU6734400A (pt)
BR (1) BR0013662A (pt)
CA (1) CA2382715A1 (pt)
DE (1) DE60011792T2 (pt)
MX (1) MXPA02001838A (pt)
WO (1) WO2001016961A1 (pt)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7250804B2 (en) * 2002-12-17 2007-07-31 M/A -Com, Inc. Series/shunt switch and method of control
US7135898B2 (en) * 2003-06-27 2006-11-14 Macronix International Co., Ltd. Power-on reset circuit with supply voltage and temperature immunity, ultra-low DC leakage current, and fast power crash reaction
US7180102B2 (en) * 2003-09-30 2007-02-20 Agere Systems Inc. Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory
US7142452B1 (en) 2004-06-07 2006-11-28 Virage Logic Corporation Method and system for securing data in a multi-time programmable non-volatile memory device
CN101002276B (zh) * 2004-07-29 2010-09-01 斯班逊有限公司 在非易失性存储装置中信息设定之方法及设备
KR100652412B1 (ko) * 2005-06-01 2006-12-01 삼성전자주식회사 정보 보호가 필요한 장치에 접근을 완전히 차단하는 회로및 방법
US7359173B2 (en) * 2005-07-26 2008-04-15 Texas Instruments Incorporated System and method for protecting IC components
US7479798B1 (en) * 2006-05-16 2009-01-20 Altera Corporation Selectively disabled output
JP5186925B2 (ja) * 2008-01-11 2013-04-24 株式会社リコー 半導体装置及びその製造方法
CN101752001B (zh) * 2008-12-12 2012-10-17 北京中电华大电子设计有限责任公司 一种防止可编程非易失存储器中内容被误改写的方法
US10426320B2 (en) 2010-04-28 2019-10-01 Xiaolong OuYang Single use medical devices
US9649014B2 (en) * 2010-04-28 2017-05-16 Xiaolong OuYang Single use medical devices
WO2012141182A1 (ja) 2011-04-11 2012-10-18 株式会社ソニー・コンピュータエンタテインメント 半導体集積回路
CN104616696A (zh) * 2015-02-06 2015-05-13 浪潮电子信息产业股份有限公司 一种efuse的控制方法
KR102294149B1 (ko) 2015-02-13 2021-08-26 삼성전자주식회사 슈미트 트리거 회로 및 이를 포함하는 비휘발성 메모리 장치
US10869592B2 (en) 2015-02-23 2020-12-22 Uroviu Corp. Handheld surgical endoscope
US10874287B2 (en) 2015-02-23 2020-12-29 Uroviu Corp. Handheld surgical endoscope
US11684248B2 (en) 2017-09-25 2023-06-27 Micronvision Corp. Endoscopy/stereo colposcopy medical instrument
US11832797B2 (en) 2016-09-25 2023-12-05 Micronvision Corp. Endoscopic fluorescence imaging
US12268358B2 (en) 2019-12-05 2025-04-08 Uroviu Corp. Portable endoscope with side-mountable disposable portion
US11980342B2 (en) 2020-11-12 2024-05-14 Micronvision Corp. Minimally invasive endoscope
US11771304B1 (en) 2020-11-12 2023-10-03 Micronvision Corp. Minimally invasive endoscope
US12702573B2 (en) 2018-06-07 2026-08-11 Micronvision Corp. Placing and removing surgical stents
CN110147333B (zh) * 2019-04-19 2021-09-28 宜鼎国际股份有限公司 写入保护电路
EP4003138A4 (en) 2019-07-25 2023-08-30 Uroviu Corp. DISPOSABLE ENDOSCOPY NEEDLE WITH INTEGRATED GRIPPER

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4935645A (en) 1988-03-02 1990-06-19 Dallas Semiconductor Corporation Fusing and detection circuit
US4933898A (en) 1989-01-12 1990-06-12 General Instrument Corporation Secure integrated circuit chip with conductive shield
US5270983A (en) 1990-09-13 1993-12-14 Ncr Corporation Single element security fusible link
JPH06243677A (ja) * 1993-02-19 1994-09-02 Hitachi Ltd 半導体記憶装置とメモリ装置及びその品種設定方法
US5315177A (en) * 1993-03-12 1994-05-24 Micron Semiconductor, Inc. One time programmable fully-testable programmable logic device with zero power and anti-fuse cell architecture
US5491444A (en) * 1993-12-28 1996-02-13 Sgs-Thomson Microelectronics, Inc. Fuse circuit with feedback disconnect
GB2288048A (en) 1994-03-29 1995-10-04 Winbond Electronics Corp Intergrated circuit
US5663902A (en) * 1996-07-18 1997-09-02 Hewlett-Packard Company System and method for disabling static current paths in fuse logic
US6014052A (en) * 1997-09-29 2000-01-11 Lsi Logic Corporation Implementation of serial fusible links
KR100302588B1 (ko) * 1998-04-14 2001-09-22 김영환 리던던시퓨즈읽기회로
US6246243B1 (en) * 2000-01-21 2001-06-12 Analog Devices, Inc. Semi-fusible link system

Also Published As

Publication number Publication date
DE60011792D1 (de) 2004-07-29
US6518823B1 (en) 2003-02-11
DE60011792T2 (de) 2005-07-14
EP1212754B1 (en) 2004-06-23
KR20020039340A (ko) 2002-05-25
CA2382715A1 (en) 2001-03-08
MXPA02001838A (es) 2002-08-12
AU6734400A (en) 2001-03-26
EP1212754A1 (en) 2002-06-12
CN1371515A (zh) 2002-09-25
WO2001016961A1 (en) 2001-03-08
KR100798286B1 (ko) 2008-01-28

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Legal Events

Date Code Title Description
B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B11Y Definitive dismissal - extension of time limit for request of examination expired [chapter 11.1.1 patent gazette]