BRPI0409710A - método e lógica contábil para determinar a utilização de recurso de processador per-thread em um processador de múltiplos threads simultáneos (smt) - Google Patents

método e lógica contábil para determinar a utilização de recurso de processador per-thread em um processador de múltiplos threads simultáneos (smt)

Info

Publication number
BRPI0409710A
BRPI0409710A BRPI0409710-6A BRPI0409710A BRPI0409710A BR PI0409710 A BRPI0409710 A BR PI0409710A BR PI0409710 A BRPI0409710 A BR PI0409710A BR PI0409710 A BRPI0409710 A BR PI0409710A
Authority
BR
Brazil
Prior art keywords
threads
processor
thread
dispatched
accounting
Prior art date
Application number
BRPI0409710-6A
Other languages
English (en)
Inventor
William Joseph Armstrong
Michael Stephen Floyd
Larry Scott Leitner
Ronald Nick Kalla
Balaram Sinharoy
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BRPI0409710A publication Critical patent/BRPI0409710A/pt
Publication of BRPI0409710B1 publication Critical patent/BRPI0409710B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3419—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885—Monitoring specific for caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)

Abstract

"MéTODO E LóGICA CONTáBIL PARA DETERMINAR A UTILIZAçãO DE RECURSO DE PROCESSADOR PER-THREAD EM UM PROCESSADOR DE MúLTIPLOS THREADS SIMULTáNEOS (SMT)". Um método contábil e lógica para determinar utilização de recurso de processador por-thread em um processador de múltiplos threads (SMT) provê um mecanismo para contabilizar o uso do recurso de processador por programas e threads dentro de programas. O uso de recurso relativo é determinado pela detecção de despacho de instruções para múltiplos thread ativos dentro do processador, que podem incluir threads ociosos que ainda estão ocupando recursos do processador. Se instruções são despachadas para todos os threads ou nenhum thread, o ciclo de processador é contabilizado igualmente para todos os threads. Alternativamente, se nenhum thread está no estado de despacho, a contabilização pode ser feita usando um estado anterior ou em conformidade com taxas de níveis de prioridade de threads. Se apenas um thread é despachado, aquele thread é contabilizado pelo ciclo de processador completo. Se múltiplos threads são despachados, mas menos que todos os threads são despachados (em um processador suportando mais que dois threads), o ciclo de processador é faturado uniformemente pelos threads despachados. Múltiplos threads podem ser detectados para os threads e um uso de recurso fracionado para cada thread e os contadores podem ser atualizados de acordo com os seus usos fracionados.
BRPI0409710A 2003-04-23 2004-04-14 método e lógica contábil para determinar a utilização de recurso de processador per-thread em um processador de múltiplos threads simultâneos (smt) BRPI0409710B1 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/422,025 US7657893B2 (en) 2003-04-23 2003-04-23 Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
PCT/GB2004/001586 WO2004095282A1 (en) 2003-04-23 2004-04-14 Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (smt) processor

Publications (2)

Publication Number Publication Date
BRPI0409710A true BRPI0409710A (pt) 2006-05-02
BRPI0409710B1 BRPI0409710B1 (pt) 2020-01-14

Family

ID=33298778

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0409710A BRPI0409710B1 (pt) 2003-04-23 2004-04-14 método e lógica contábil para determinar a utilização de recurso de processador per-thread em um processador de múltiplos threads simultâneos (smt)

Country Status (14)

Country Link
US (3) US7657893B2 (pt)
EP (1) EP1616259B1 (pt)
JP (1) JP4536717B2 (pt)
KR (1) KR100754153B1 (pt)
CN (1) CN100458727C (pt)
AT (1) ATE364204T1 (pt)
BR (1) BRPI0409710B1 (pt)
CA (1) CA2518468C (pt)
DE (1) DE602004006858T2 (pt)
ES (1) ES2286630T3 (pt)
IL (1) IL171706A (pt)
MX (1) MXPA05011307A (pt)
TW (1) TWI291131B (pt)
WO (1) WO2004095282A1 (pt)

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Also Published As

Publication number Publication date
JP4536717B2 (ja) 2010-09-01
DE602004006858D1 (de) 2007-07-19
MXPA05011307A (es) 2006-01-30
KR20060002842A (ko) 2006-01-09
CA2518468A1 (en) 2004-11-04
ES2286630T3 (es) 2007-12-01
US7657893B2 (en) 2010-02-02
CN100458727C (zh) 2009-02-04
EP1616259B1 (en) 2007-06-06
ATE364204T1 (de) 2007-06-15
IL171706A (en) 2011-03-31
US20120216210A1 (en) 2012-08-23
TW200504596A (en) 2005-02-01
US20040216113A1 (en) 2004-10-28
US9003417B2 (en) 2015-04-07
CA2518468C (en) 2008-09-30
BRPI0409710B1 (pt) 2020-01-14
US20100037233A1 (en) 2010-02-11
KR100754153B1 (ko) 2007-09-03
TWI291131B (en) 2007-12-11
CN1985242A (zh) 2007-06-20
US8209698B2 (en) 2012-06-26
WO2004095282A1 (en) 2004-11-04
DE602004006858T2 (de) 2008-02-14
EP1616259A1 (en) 2006-01-18
JP2006524380A (ja) 2006-10-26

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