BRPI0510332A - processo para a produção de contatos transversais em estruturas de placas de circuitos impressos - Google Patents

processo para a produção de contatos transversais em estruturas de placas de circuitos impressos

Info

Publication number
BRPI0510332A
BRPI0510332A BRPI0510332-0A BRPI0510332A BRPI0510332A BR PI0510332 A BRPI0510332 A BR PI0510332A BR PI0510332 A BRPI0510332 A BR PI0510332A BR PI0510332 A BRPI0510332 A BR PI0510332A
Authority
BR
Brazil
Prior art keywords
circuit board
printed circuit
support element
holes
board structures
Prior art date
Application number
BRPI0510332-0A
Other languages
English (en)
Inventor
Georg Busch
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BRPI0510332A publication Critical patent/BRPI0510332A/pt

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0154Polyimide
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09Treatments involving charged particles
    • H05K2203/092Particle beam, e.g. using an electron beam or an ion beam
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128Assembling formed circuit to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Electric Cable Installation (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)

Abstract

PROCESSO PARA A PRODUçãO DE CONTATOS TRANSVERSAIS EM ESTRUTURAS DE PLACAS DE CIRCUITOS IMPRESSOS. A presente invenção refere-se a um processo para a produção de estruturas de placas de circuitos impressos, que, entre outras, também podem ser concretizadas sem adesivo, flexíveis e com contatos transversais muito pequenos com diâmetros na ordem de grandeza de 1 a 3 <109>m. O processo refere-se a um meio de suporte para a estrutura de placa de circuitos impressos, que ainda se encontra sem revestimento de cobre. No material assim preparado são produzidos os furos com ajuda de íons pesados especialmente para os contatos transversais muito pequenos. Em seguida, ocorre o revestimento de cobre do meio de suporte. Nesse caso, ao mesmo tempo, são produzidos os contatos transversais elétricos. Se o meio de suporte for poliimida flexível, por exemplo, e ainda não tiver sido tratado previamente para o revestimento com cobre, então especialmente o método de íons pesados também poderá ser empregado, além de produzir os furos para tomar ásperas as superfícies. Em seguida, completa-se a desejada estrutura de placa de circuitos impressos conforme os métodos convencionais.
BRPI0510332-0A 2004-04-29 2005-03-02 processo para a produção de contatos transversais em estruturas de placas de circuitos impressos BRPI0510332A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004021063 2004-04-29
PCT/EP2005/050918 WO2005107348A1 (de) 2004-04-29 2005-03-02 Verfahren zur herstellung von durchkontaktierungen bei leiterplattengebilden

Publications (1)

Publication Number Publication Date
BRPI0510332A true BRPI0510332A (pt) 2007-10-23

Family

ID=34962647

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0510332-0A BRPI0510332A (pt) 2004-04-29 2005-03-02 processo para a produção de contatos transversais em estruturas de placas de circuitos impressos

Country Status (9)

Country Link
US (1) US20070220745A1 (pt)
EP (1) EP1754399B1 (pt)
JP (1) JP2007535154A (pt)
KR (1) KR20070004929A (pt)
CN (1) CN1961621A (pt)
AT (1) ATE385399T1 (pt)
BR (1) BRPI0510332A (pt)
DE (1) DE502005002731D1 (pt)
WO (1) WO2005107348A1 (pt)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7918018B2 (en) * 2007-06-12 2011-04-05 Texas Instruments Incorporated Method of fabricating a semiconductor device
FR2927218B1 (fr) 2008-02-06 2010-03-05 Hydromecanique & Frottement Procede de fabrication d'un element chauffant par depot de couches minces sur un substrat isolant et l'element obtenu

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3562009A (en) * 1967-02-14 1971-02-09 Western Electric Co Method of providing electrically conductive substrate through-holes
US6153060A (en) * 1999-08-04 2000-11-28 Honeywell International Inc. Sputtering process
US20020000370A1 (en) * 1999-08-04 2002-01-03 Richard J. Pommer Ion processing of a substrate
JP3879816B2 (ja) * 2000-06-02 2007-02-14 セイコーエプソン株式会社 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器
US6629348B2 (en) * 2001-05-01 2003-10-07 Oak-Mitsui, Inc. Substrate adhesion enhancement to film
DE10234614B3 (de) * 2002-07-24 2004-03-04 Fractal Ag Verfahren zur Bearbeitung von Trägermaterial durch Schwerionenbestrahlung und nachfolgenden Ätzprozess

Also Published As

Publication number Publication date
CN1961621A (zh) 2007-05-09
EP1754399A1 (de) 2007-02-21
KR20070004929A (ko) 2007-01-09
DE502005002731D1 (de) 2008-03-20
JP2007535154A (ja) 2007-11-29
US20070220745A1 (en) 2007-09-27
ATE385399T1 (de) 2008-02-15
EP1754399B1 (de) 2008-01-30
WO2005107348A1 (de) 2005-11-10

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE AS 5A, 6A E 7A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2158 DE 15/05/2012.