BRPI0606562A8 - Método para aplicar uma composição eletrônica a um substrato e um dispositivo para aplicar a referida composição - Google Patents

Método para aplicar uma composição eletrônica a um substrato e um dispositivo para aplicar a referida composição

Info

Publication number
BRPI0606562A8
BRPI0606562A8 BRPI0606562A BRPI0606562A BRPI0606562A8 BR PI0606562 A8 BRPI0606562 A8 BR PI0606562A8 BR PI0606562 A BRPI0606562 A BR PI0606562A BR PI0606562 A BRPI0606562 A BR PI0606562A BR PI0606562 A8 BRPI0606562 A8 BR PI0606562A8
Authority
BR
Brazil
Prior art keywords
composition
substrate
positioning
chip
segment
Prior art date
Application number
BRPI0606562A
Other languages
English (en)
Inventor
Droz François
Original Assignee
Nagraid Sa
Nagravision Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP05100694A external-priority patent/EP1686512A1/fr
Application filed by Nagraid Sa, Nagravision Sa filed Critical Nagraid Sa
Publication of BRPI0606562A2 publication Critical patent/BRPI0606562A2/pt
Publication of BRPI0606562A8 publication Critical patent/BRPI0606562A8/pt

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/53—Means to assemble or disassemble
    • Y10T29/5313—Means to assemble electrical device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Packaging Frangible Articles (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

MÉTODO PARA APLICAR UMA COMPOSIÇÃO ELETRÔNICA A UM SUBSTRATO E UM DISPOSITIVO PARA APLICAR A REFERIDA COMPOSIÇÃO. O objetivo da presente invenção é assegurar uma máxima precisão tanto na etapa da fabricação de uma composição eletrônica de um chip com dimensões pequenas como na etapa de posicionamento de tal composição em um substrato isolante. O objetivo é alcançado por meio de um processo de posicionamento em um suporte, chamado substrato (7), de pelo menos uma composição eletrônica consistindo de um chip (4) incluindo pelo menos um contato elétrico (5, 5') em uma de suas faces, dito contato (5, 5') sendo conectado a um segmento (3, 3') de trilhas condutivas, e dito posicionamento sendo realizado por meio de um dispositivo de posicionamento (6) retendo e posicionando dita composição no substrato (7), caracterizado pelo fato de incluir as seguintes etapas: - formação de um segmento (3, 3') de trilhas condutivas tendo um contorno pré-determinado. - transferência do segmento de trilhas (3, 3') ao dispositivo de posicionamento (6). - captura do chip (4) com o dispositivo de posicionamento (6) contendo o segmento de trilhas (3, 3') de tal modo que dito segmento de trilhas (3, 3') é posicionado em pelo menos um contato (5, 5') do chip (4). - posicionamento da composição eletrônica consistindo do chip (4) e do segmento de trilhas (3, 3') em uma posição pré-determinada no substrato (7). - encaixe do chip (4) e do segmento de trilhas (3, 3') no substrato. A invenção também se refere ao dispositivo de posicionamento usado no processo e a um objeto portátil incluindo uma composição eletrônica posicionada de acordo com o processo.
BRPI0606562A 2005-02-01 2006-02-01 Método para aplicar uma composição eletrônica a um substrato e um dispositivo para aplicar a referida composição BRPI0606562A8 (pt)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
EP05100694.8 2005-02-01
EP05100694A EP1686512A1 (fr) 2005-02-01 2005-02-01 Procédé de placement d'un ensemble électronique sur un substrat et dispositif de placement d'un tel ensemble
EP05109094 2005-09-30
EP05109094.2 2005-09-30
PCT/EP2006/050585 WO2006082199A2 (fr) 2005-02-01 2006-02-01 Procédé de placement d'un ensemble électronique sur un substrat et dispositif de placement d'un tel ensemble

Publications (2)

Publication Number Publication Date
BRPI0606562A2 BRPI0606562A2 (pt) 2010-07-06
BRPI0606562A8 true BRPI0606562A8 (pt) 2016-08-02

Family

ID=36645615

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0606562A BRPI0606562A8 (pt) 2005-02-01 2006-02-01 Método para aplicar uma composição eletrônica a um substrato e um dispositivo para aplicar a referida composição

Country Status (27)

Country Link
US (2) US7785932B2 (pt)
EP (1) EP1846874B1 (pt)
JP (1) JP4838813B2 (pt)
KR (1) KR101145535B1 (pt)
CN (1) CN101111855B (pt)
AP (1) AP2226A (pt)
AT (1) ATE413666T1 (pt)
AU (1) AU2006210245B2 (pt)
BR (1) BRPI0606562A8 (pt)
CA (1) CA2595796C (pt)
CY (1) CY1108717T1 (pt)
DE (1) DE602006003528D1 (pt)
DK (1) DK1846874T3 (pt)
EG (1) EG25336A (pt)
ES (1) ES2318724T3 (pt)
HR (1) HRP20090045T3 (pt)
MA (1) MA29242B1 (pt)
ME (1) ME01052B (pt)
MX (1) MX2007009166A (pt)
PL (1) PL1846874T3 (pt)
PT (1) PT1846874E (pt)
RS (1) RS50718B (pt)
RU (1) RU2398280C2 (pt)
SI (1) SI1846874T1 (pt)
TN (1) TNSN07302A1 (pt)
WO (1) WO2006082199A2 (pt)
ZA (1) ZA200707271B (pt)

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US8963313B2 (en) * 2011-12-22 2015-02-24 Raytheon Company Heterogeneous chip integration with low loss interconnection through adaptive patterning
EP2736001A1 (fr) * 2012-11-27 2014-05-28 Gemalto SA Module électronique à interface de communication tridimensionnelle
EP2767935A1 (fr) * 2013-02-18 2014-08-20 NagraID S.A. Couche plastique pour carte électronique
EP3259708A1 (fr) * 2015-02-20 2017-12-27 Nid Sa Procédé de fabrication d'un dispositif comportant au moins un élément électronique associé à un substrat et à une antenne
DE102015220855A1 (de) * 2015-10-26 2017-04-27 Robert Bosch Gmbh Sensorvorrichtung zur Erfassung mindestens einer Strömungseigenschaft eines fluiden Mediums
RU2725617C2 (ru) * 2016-03-01 2020-07-03 Кардлаб Апс Схемный слой для карты с интегральной схемой
US10580745B1 (en) * 2018-08-31 2020-03-03 Globalfoundries Inc. Wafer level packaging with integrated antenna structures

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Also Published As

Publication number Publication date
US20060172458A1 (en) 2006-08-03
WO2006082199A2 (fr) 2006-08-10
JP4838813B2 (ja) 2011-12-14
DK1846874T3 (da) 2009-03-09
RU2398280C2 (ru) 2010-08-27
AP2007004088A0 (en) 2007-08-31
US8218332B2 (en) 2012-07-10
RS50718B (sr) 2010-06-30
CA2595796C (en) 2013-04-02
ZA200707271B (en) 2009-05-27
BRPI0606562A2 (pt) 2010-07-06
RU2007128621A (ru) 2009-03-10
TNSN07302A1 (fr) 2008-12-31
EP1846874A2 (fr) 2007-10-24
ES2318724T3 (es) 2009-05-01
HRP20090045T3 (en) 2009-02-28
CN101111855A (zh) 2008-01-23
EG25336A (en) 2011-12-14
CY1108717T1 (el) 2014-04-09
MX2007009166A (es) 2007-09-12
PT1846874E (pt) 2009-01-29
MA29242B1 (fr) 2008-02-01
EP1846874B1 (fr) 2008-11-05
PL1846874T3 (pl) 2009-04-30
ATE413666T1 (de) 2008-11-15
US20100328914A1 (en) 2010-12-30
SI1846874T1 (sl) 2009-04-30
ME01052B (me) 2012-10-20
KR101145535B1 (ko) 2012-05-15
JP2008529292A (ja) 2008-07-31
US7785932B2 (en) 2010-08-31
KR20070103745A (ko) 2007-10-24
AU2006210245B2 (en) 2011-04-14
WO2006082199A3 (fr) 2006-11-23
AP2226A (en) 2011-03-29
CA2595796A1 (en) 2006-08-10
DE602006003528D1 (de) 2008-12-18
CN101111855B (zh) 2012-04-18
AU2006210245A1 (en) 2006-08-10

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Legal Events

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B06G Technical and formal requirements: other requirements [chapter 6.7 patent gazette]

Free format text: SOLICITA-SE A REGULARIZACAO DA PROCURACAO, UMA VEZ QUE BASEADO NO ARTIGO 216 1O DA LPI, O DOCUMENTO DE PROCURACAO DEVE SER APRESENTADO EM SUA FORMA AUTENTICADA; OU SEGUNDO PARECER DA PROCURADORIA MEMO/INPI/PROC/NO 074/93, DEVE CONSTAR UMA DECLARACAO DE VERACIDADE, A QUAL DEVE SER ASSINADA POR UMA PESSOA DEVIDAMENTE AUTORIZADA A REPRESENTAR O INTERESSADO, DEVENDO A MESMA CONSTAR NO INSTRUMENTO DE PROCURACAO, OU NO SEU SUBSTABELECIMENTO.

B06G Technical and formal requirements: other requirements [chapter 6.7 patent gazette]

Free format text: APRESENTE NOVA FOLHA DE RESUMO INICIADO PELO TITULO, CONFORME DISPOSTO NO AN 127

B25A Requested transfer of rights approved

Owner name: NAGRAVISION S.A (CH)

B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements