BRPI0816681A2 - Geração de sinal de oscilador com atenuação de estímulo em um dispositivo de comunicação sem fio. - Google Patents
Geração de sinal de oscilador com atenuação de estímulo em um dispositivo de comunicação sem fio.Info
- Publication number
- BRPI0816681A2 BRPI0816681A2 BRPI0816681A BRPI0816681A2 BR PI0816681 A2 BRPI0816681 A2 BR PI0816681A2 BR PI0816681 A BRPI0816681 A BR PI0816681A BR PI0816681 A2 BRPI0816681 A2 BR PI0816681A2
- Authority
- BR
- Brazil
- Prior art keywords
- attenuator
- stimulus
- wireless communication
- communication device
- signal generation
- Prior art date
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1072—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US97272107P | 2007-09-14 | 2007-09-14 | |
| US97628507P | 2007-09-28 | 2007-09-28 | |
| US11/868,824 US8044723B2 (en) | 2007-09-14 | 2007-10-08 | Oscillator signal generation with spur mitigation in a wireless communication device |
| PCT/US2008/076085 WO2009036221A1 (en) | 2007-09-14 | 2008-09-11 | Oscillator signal generation with spur mitigation in a wireless communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BRPI0816681A2 true BRPI0816681A2 (pt) | 2015-03-17 |
Family
ID=40044001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BRPI0816681 BRPI0816681A2 (pt) | 2007-09-14 | 2008-09-11 | Geração de sinal de oscilador com atenuação de estímulo em um dispositivo de comunicação sem fio. |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US8044723B2 (pt) |
| EP (1) | EP2198518A1 (pt) |
| JP (1) | JP5054195B2 (pt) |
| KR (1) | KR101168617B1 (pt) |
| CN (1) | CN101803197B (pt) |
| BR (1) | BRPI0816681A2 (pt) |
| CA (1) | CA2698268A1 (pt) |
| TW (1) | TW200926608A (pt) |
| WO (1) | WO2009036221A1 (pt) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8073416B2 (en) * | 2007-10-25 | 2011-12-06 | Qualcomm Incorporated | Method and apparatus for controlling a bias current of a VCO in a phase-locked loop |
| WO2010023502A1 (en) * | 2008-08-26 | 2010-03-04 | Freescale Semiconductor, Inc. | Semiconductor device, wireless communication device and method for generating a synthesized frequency signal |
| US7956696B2 (en) * | 2008-09-19 | 2011-06-07 | Altera Corporation | Techniques for generating fractional clock signals |
| TWI380597B (en) * | 2009-04-08 | 2012-12-21 | Univ Nat Taiwan | Signal generating circuits |
| US8604840B2 (en) | 2009-06-25 | 2013-12-10 | Qualcomm Incorporated | Frequency synthesizer noise reduction |
| US20110299644A1 (en) * | 2010-06-08 | 2011-12-08 | Bing Xu | Emission Suppression for Wireless Communication Devices |
| US9344100B2 (en) | 2010-10-05 | 2016-05-17 | Qualcomm Incorporated | Reconfigurable local oscillator for optimal noise performance in a multi-standard transceiver |
| EP2469740B1 (en) * | 2010-12-22 | 2013-06-26 | Telefonaktiebolaget L M Ericsson (Publ) | Methods and receiver for positioning of clock related spurious signals |
| US8384485B2 (en) | 2011-04-29 | 2013-02-26 | Smsc Holdings S.A.R.L. | Reducing spurs in injection-locked oscillators |
| US8755479B2 (en) * | 2011-11-04 | 2014-06-17 | Broadcom Corporation | Minimization of spurs generated from a free running oscillator |
| JPWO2013161148A1 (ja) * | 2012-04-27 | 2015-12-21 | パナソニックＩｐマネジメント株式会社 | 受信装置 |
| JP5727968B2 (ja) * | 2012-05-29 | 2015-06-03 | 旭化成エレクトロニクス株式会社 | 電流制御回路およびこれを用いたｐｌｌ回路 |
| CN102882623B (zh) * | 2012-07-26 | 2014-11-19 | 哈尔滨工业大学 | 基于fpga的可配置的时钟频率合成装置 |
| US9374121B2 (en) * | 2012-08-30 | 2016-06-21 | Qualcomm Incorporated | Transceiver with super-heterodyne and zero intermediate frequency (ZIF) topologies |
| US9263990B2 (en) * | 2013-05-21 | 2016-02-16 | Qualcomm Incorporated | Impedance transformer for use with a quadrature passive CMOS mixer |
| DE102014210747B4 (de) * | 2014-02-12 | 2023-11-16 | Rohde & Schwarz GmbH & Co. Kommanditgesellschaft | Phasenregelschleife mit Varaktor in Mikrosystemtechnik |
| US9615369B2 (en) | 2014-05-14 | 2017-04-04 | Qualcomm Incorporated | Avoiding spurious responses with reconfigurable LO dividers |
| CN104242929B (zh) * | 2014-09-01 | 2018-09-25 | 长沙景嘉微电子股份有限公司 | 一种带调制深度补偿的频率调制系统 |
| US9473146B2 (en) * | 2015-02-03 | 2016-10-18 | Micron Technology, Inc. | Apparatuses and methods for low power counting circuits |
| US9712176B1 (en) * | 2016-06-10 | 2017-07-18 | Silicon Laboratories Inc. | Apparatus for low power signal generator and associated methods |
| US20190244062A1 (en) * | 2018-02-04 | 2019-08-08 | KaiKuTek Inc. | Gesture recognition method, gesture recognition system, and performing device therefore |
| US10177873B1 (en) * | 2018-05-04 | 2019-01-08 | Qualcomm Incorporated | Concurrent support for multiple frequency bands for satellite navigation signals |
| CN110311674B (zh) * | 2019-06-28 | 2023-07-14 | 西安紫光国芯半导体有限公司 | 用于抑制锁相环输出时钟杂散的控制方法及电路 |
| US11082079B2 (en) * | 2019-08-08 | 2021-08-03 | Anokiwave, Inc. | Spur mitigation in a heterodyne upconversion system |
| KR102887955B1 (ko) | 2020-10-15 | 2025-11-19 | 삼성전자주식회사 | 무선 통신 시스템에서 다수의 사업자를 지원하는 네트워크 공유 방법 및 장치. |
| US11539383B2 (en) * | 2020-11-23 | 2022-12-27 | Swiftlink Technologies Co., Ltd. | Bidirectional image-rejection active array with reduced LO requirement |
| US11543890B2 (en) * | 2021-03-22 | 2023-01-03 | KaiKuTek Inc. | Custom gesture collection and recognition system having machine learning accelerator |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940011436B1 (ko) | 1989-04-19 | 1994-12-15 | 가부시끼가이샤 히다찌세이사꾸쇼 | 자기디스크 기억장치 |
| US5631587A (en) * | 1994-05-03 | 1997-05-20 | Pericom Semiconductor Corporation | Frequency synthesizer with adaptive loop bandwidth |
| JP3327028B2 (ja) * | 1995-02-14 | 2002-09-24 | 松下電器産業株式会社 | 周波数シンセサイザ |
| JPH11150735A (ja) * | 1997-11-14 | 1999-06-02 | Toshiba Corp | 信号発生回路 |
| US6188288B1 (en) * | 1999-01-12 | 2001-02-13 | Radiocom Corporation | Fully integrated digital frequency synthesizer |
| JP2000315948A (ja) * | 1999-04-28 | 2000-11-14 | Nec Corp | Ｐｌｌ周波数シンセサイザ |
| JP2001016103A (ja) | 1999-06-30 | 2001-01-19 | Toshiba Corp | Ｐｌｌシンセサイザ |
| DE19946200A1 (de) * | 1999-09-27 | 2001-05-03 | Infineon Technologies Ag | Phasenregelkreis |
| JP3360667B2 (ja) | 1999-12-01 | 2002-12-24 | 日本電気株式会社 | 位相同期ループの同期方法、位相同期ループ及び該位相同期ループを備えた半導体装置 |
| US6441660B1 (en) * | 2001-02-02 | 2002-08-27 | Broadcom Corporation | High speed, wide bandwidth phase locked loop |
| WO2002075942A2 (en) * | 2001-03-14 | 2002-09-26 | California Institute Of Technology | Concurrent dual-band receiver architecture |
| US6583675B2 (en) * | 2001-03-20 | 2003-06-24 | Broadcom Corporation | Apparatus and method for phase lock loop gain control using unit current sources |
| WO2003032514A2 (en) | 2001-10-11 | 2003-04-17 | Sirf Technologies, Inc. | RF CONVERTER WITH MULTIPLE MODE FREQUENCY SYNTHESIZER COMPATIBLE WITH A 48 Fo GPS BASEBAND PROCESSOR |
| US7272374B2 (en) | 2004-06-30 | 2007-09-18 | Silicon Laboratories Inc. | Dynamic selection of local oscillator signal injection for image rejection in integrated receivers |
| US7230505B2 (en) * | 2005-04-04 | 2007-06-12 | Freescale Semiconductor, Inc. | Voltage controlled oscillator with gain control |
| US7268630B2 (en) * | 2005-04-25 | 2007-09-11 | International Business Machines Corporation | Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillator |
| KR100736407B1 (ko) * | 2006-01-17 | 2007-07-09 | 삼성전자주식회사 | 락 타임과 주파수 에러를 감소시킬 수 있는 시그마-델타 프랙셔널-ｎ 위상동기루프 |
| US7772930B2 (en) * | 2006-04-06 | 2010-08-10 | Broadcom Corporation | Calibration techniques for phase-locked loop bandwidth |
-
2007
- 2007-10-08 US US11/868,824 patent/US8044723B2/en active Active
-
2008
- 2008-09-11 CN CN2008801067904A patent/CN101803197B/zh not_active Expired - Fee Related
- 2008-09-11 KR KR1020107007882A patent/KR101168617B1/ko not_active Expired - Fee Related
- 2008-09-11 CA CA2698268A patent/CA2698268A1/en not_active Abandoned
- 2008-09-11 WO PCT/US2008/076085 patent/WO2009036221A1/en not_active Ceased
- 2008-09-11 JP JP2010525007A patent/JP5054195B2/ja not_active Expired - Fee Related
- 2008-09-11 BR BRPI0816681 patent/BRPI0816681A2/pt not_active IP Right Cessation
- 2008-09-11 EP EP08831228A patent/EP2198518A1/en not_active Ceased
- 2008-09-12 TW TW097135209A patent/TW200926608A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| CN101803197A (zh) | 2010-08-11 |
| EP2198518A1 (en) | 2010-06-23 |
| US20090072912A1 (en) | 2009-03-19 |
| JP5054195B2 (ja) | 2012-10-24 |
| US8044723B2 (en) | 2011-10-25 |
| CN101803197B (zh) | 2012-09-05 |
| TW200926608A (en) | 2009-06-16 |
| WO2009036221A1 (en) | 2009-03-19 |
| KR20100052562A (ko) | 2010-05-19 |
| CA2698268A1 (en) | 2009-03-19 |
| KR101168617B1 (ko) | 2012-08-03 |
| JP2010539809A (ja) | 2010-12-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B08F | Application fees: application dismissed [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 7A ANUIDADE. |
|
| B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2343 DE 01-12-2015 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013. |