BRPI0906424A2 - recurso de atributo de cache extraído e instrução consequente - Google Patents
recurso de atributo de cache extraído e instrução consequenteInfo
- Publication number
- BRPI0906424A2 BRPI0906424A2 BRPI0906424A BRPI0906424A BRPI0906424A2 BR PI0906424 A2 BRPI0906424 A2 BR PI0906424A2 BR PI0906424 A BRPI0906424 A BR PI0906424A BR PI0906424 A BRPI0906424 A BR PI0906424A BR PI0906424 A2 BRPI0906424 A2 BR PI0906424A2
- Authority
- BR
- Brazil
- Prior art keywords
- consequent
- statement
- attribute feature
- cache attribute
- extracted cache
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30047—Prefetch instructions; cache control instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30058—Conditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/972,675 US7870339B2 (en) | 2008-01-11 | 2008-01-11 | Extract cache attribute facility and instruction therefore |
| US11/972,675 | 2008-01-11 | ||
| PCT/EP2009/050107 WO2009087160A1 (en) | 2008-01-11 | 2009-01-07 | Extract cache attribute facility and instruction therefore |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| BRPI0906424A2 true BRPI0906424A2 (pt) | 2016-10-11 |
| BRPI0906424B1 BRPI0906424B1 (pt) | 2020-10-20 |
Family
ID=40513439
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BRPI0906424-9A BRPI0906424B1 (pt) | 2008-01-11 | 2009-01-07 | recurso de atributo de cache extraído e instrução consequente |
Country Status (16)
| Country | Link |
|---|---|
| US (3) | US7870339B2 (pt) |
| EP (1) | EP2229620B1 (pt) |
| JP (1) | JP5052678B2 (pt) |
| KR (1) | KR101231562B1 (pt) |
| CN (1) | CN101911013B (pt) |
| AT (1) | ATE516538T1 (pt) |
| BR (1) | BRPI0906424B1 (pt) |
| CA (1) | CA2701093C (pt) |
| CY (1) | CY1112472T1 (pt) |
| DK (1) | DK2229620T3 (pt) |
| ES (1) | ES2368682T3 (pt) |
| IL (1) | IL206848A (pt) |
| PL (1) | PL2229620T3 (pt) |
| PT (1) | PT2229620E (pt) |
| SI (1) | SI2229620T1 (pt) |
| WO (1) | WO2009087160A1 (pt) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9280480B2 (en) | 2008-01-11 | 2016-03-08 | International Business Machines Corporation | Extract target cache attribute facility and instruction therefor |
| US8151076B2 (en) * | 2008-04-04 | 2012-04-03 | Cisco Technology, Inc. | Mapping memory segments in a translation lookaside buffer |
| US9454367B2 (en) * | 2012-03-15 | 2016-09-27 | International Business Machines Corporation | Finding the length of a set of character data having a termination character |
| US9268566B2 (en) | 2012-03-15 | 2016-02-23 | International Business Machines Corporation | Character data match determination by loading registers at most up to memory block boundary and comparing |
| US9280347B2 (en) | 2012-03-15 | 2016-03-08 | International Business Machines Corporation | Transforming non-contiguous instruction specifiers to contiguous instruction specifiers |
| US9454366B2 (en) | 2012-03-15 | 2016-09-27 | International Business Machines Corporation | Copying character data having a termination character from one memory location to another |
| US9710266B2 (en) | 2012-03-15 | 2017-07-18 | International Business Machines Corporation | Instruction to compute the distance to a specified memory boundary |
| US9459868B2 (en) | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Instruction to load data up to a dynamically determined memory boundary |
| US9459867B2 (en) * | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Instruction to load data up to a specified memory boundary indicated by the instruction |
| US9459864B2 (en) | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Vector string range compare |
| US9588762B2 (en) | 2012-03-15 | 2017-03-07 | International Business Machines Corporation | Vector find element not equal instruction |
| US9715383B2 (en) | 2012-03-15 | 2017-07-25 | International Business Machines Corporation | Vector find element equal instruction |
| US10620957B2 (en) * | 2015-10-22 | 2020-04-14 | Texas Instruments Incorporated | Method for forming constant extensions in the same execute packet in a VLIW processor |
| US10713048B2 (en) * | 2017-01-19 | 2020-07-14 | International Business Machines Corporation | Conditional branch to an indirectly specified location |
| US10409614B2 (en) | 2017-04-24 | 2019-09-10 | Intel Corporation | Instructions having support for floating point and integer data types in the same register |
| US10474458B2 (en) | 2017-04-28 | 2019-11-12 | Intel Corporation | Instructions and logic to perform floating-point and integer operations for machine learning |
| CN109408429B (zh) * | 2018-11-01 | 2020-10-16 | 苏州浪潮智能科技有限公司 | 一种低速接口的缓存方法与装置 |
| US11934342B2 (en) | 2019-03-15 | 2024-03-19 | Intel Corporation | Assistance for hardware prefetch in cache access |
| DE112020000846T5 (de) | 2019-03-15 | 2021-11-18 | Intel Corporation | Architektur für Block-Sparse-Operationen an einem systolischen Array |
| US12561276B2 (en) | 2019-03-15 | 2026-02-24 | Intel Corporation | Systems and methods for updating memory side caches in a multi-GPU configuration |
| EP3938893B1 (en) | 2019-03-15 | 2025-10-15 | Intel Corporation | Systems and methods for cache optimization |
| US11861761B2 (en) | 2019-11-15 | 2024-01-02 | Intel Corporation | Graphics processing unit processing and caching improvements |
| US11663746B2 (en) | 2019-11-15 | 2023-05-30 | Intel Corporation | Systolic arithmetic on sparse data |
| CN117093510B (zh) * | 2023-05-30 | 2024-04-09 | 中国人民解放军军事科学院国防科技创新研究院 | 大小端通用的缓存行高效索引方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US3825895A (en) | 1973-05-14 | 1974-07-23 | Amdahl Corp | Operand comparator |
| US3982229A (en) | 1975-01-08 | 1976-09-21 | Bell Telephone Laboratories, Incorporated | Combinational logic arrangement |
| US4713750A (en) | 1983-03-31 | 1987-12-15 | Fairchild Camera & Instrument Corporation | Microprocessor with compact mapped programmable logic array |
| US4569016A (en) | 1983-06-30 | 1986-02-04 | International Business Machines Corporation | Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system |
| US4578750A (en) | 1983-08-24 | 1986-03-25 | Amdahl Corporation | Code determination using half-adder based operand comparator |
| US5113523A (en) | 1985-05-06 | 1992-05-12 | Ncube Corporation | High performance computer system |
| JPS6382513A (ja) | 1986-09-26 | 1988-04-13 | Toshiba Corp | バレルシフタ |
| ATE109910T1 (de) * | 1988-01-20 | 1994-08-15 | Advanced Micro Devices Inc | Organisation eines integrierten cachespeichers zur flexiblen anwendung zur unterstützung von multiprozessor-operationen. |
| JPH05158795A (ja) * | 1991-12-06 | 1993-06-25 | Nec Corp | キャッシュメモリシステム |
| US5859994A (en) | 1992-08-10 | 1999-01-12 | Intel Corporation | Apparatus and method for modifying instruction length decoding in a computer processor |
| JPH07129464A (ja) * | 1993-11-05 | 1995-05-19 | Hitachi Ltd | 情報処理装置 |
| US6067613A (en) | 1993-11-30 | 2000-05-23 | Texas Instruments Incorporated | Rotation register for orthogonal data transformation |
| US5748950A (en) | 1994-09-20 | 1998-05-05 | Intel Corporation | Method and apparatus for providing an optimized compare-and-branch instruction |
| EP0730220A3 (en) | 1995-03-03 | 1997-01-08 | Hal Computer Systems Inc | Method and device for quickly executing branch instructions |
| US5732242A (en) | 1995-03-24 | 1998-03-24 | Silicon Graphics, Inc. | Consistently specifying way destinations through prefetching hints |
| JP3790607B2 (ja) | 1997-06-16 | 2006-06-28 | 松下電器産業株式会社 | Ｖｌｉｗプロセッサ |
| US6223256B1 (en) | 1997-07-22 | 2001-04-24 | Hewlett-Packard Company | Computer cache memory with classes and dynamic selection of replacement algorithms |
| US6112293A (en) | 1997-11-17 | 2000-08-29 | Advanced Micro Devices, Inc. | Processor configured to generate lookahead results from operand collapse unit and for inhibiting receipt/execution of the first instruction based on the lookahead result |
| US6035392A (en) * | 1998-02-20 | 2000-03-07 | International Business Machines Corporation | Computer with optimizing hardware for conditional hedge fetching into cache storage |
| US6088789A (en) * | 1998-05-13 | 2000-07-11 | Advanced Micro Devices, Inc. | Prefetch instruction specifying destination functional unit and read/write access mode |
| US6349363B2 (en) * | 1998-12-08 | 2002-02-19 | Intel Corporation | Multi-section cache with different attributes for each section |
| US6446197B1 (en) | 1999-10-01 | 2002-09-03 | Hitachi, Ltd. | Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructions |
| US6763327B1 (en) | 2000-02-17 | 2004-07-13 | Tensilica, Inc. | Abstraction of configurable processor functionality for operating systems portability |
| US6738895B1 (en) | 2000-08-31 | 2004-05-18 | Micron Technology, Inc. | Method and system for substantially registerless processing |
| US7165101B2 (en) | 2001-12-03 | 2007-01-16 | Sun Microsystems, Inc. | Transparent optimization of network traffic in distributed systems |
| US6842822B2 (en) * | 2002-04-05 | 2005-01-11 | Freescale Semiconductor, Inc. | System and method for cache external writing |
| US7493480B2 (en) | 2002-07-18 | 2009-02-17 | International Business Machines Corporation | Method and apparatus for prefetching branch history information |
| US20060212439A1 (en) | 2005-03-21 | 2006-09-21 | Microsoft Corporation | System and method of efficient data backup in a networking environment |
| US7529768B2 (en) * | 2005-12-08 | 2009-05-05 | International Business Machines Corporation | Determining which objects to place in a container based on relationships of the objects |
| US8335810B2 (en) | 2006-01-31 | 2012-12-18 | Qualcomm Incorporated | Register-based shifts for a unidirectional rotator |
-
2008
- 2008-01-11 US US11/972,675 patent/US7870339B2/en active Active
-
2009
- 2009-01-07 ES ES09700229T patent/ES2368682T3/es active Active
- 2009-01-07 CA CA2701093A patent/CA2701093C/en active Active
- 2009-01-07 PT PT09700229T patent/PT2229620E/pt unknown
- 2009-01-07 SI SI200930067T patent/SI2229620T1/sl unknown
- 2009-01-07 CN CN2009801017685A patent/CN101911013B/zh active Active
- 2009-01-07 BR BRPI0906424-9A patent/BRPI0906424B1/pt active IP Right Grant
- 2009-01-07 AT AT09700229T patent/ATE516538T1/de active
- 2009-01-07 EP EP09700229A patent/EP2229620B1/en active Active
- 2009-01-07 KR KR1020107014473A patent/KR101231562B1/ko active Active
- 2009-01-07 PL PL09700229T patent/PL2229620T3/pl unknown
- 2009-01-07 JP JP2010541775A patent/JP5052678B2/ja active Active
- 2009-01-07 WO PCT/EP2009/050107 patent/WO2009087160A1/en not_active Ceased
- 2009-01-07 DK DK09700229.9T patent/DK2229620T3/da active
-
2010
- 2010-07-07 IL IL206848A patent/IL206848A/en active IP Right Grant
- 2010-12-13 US US12/966,316 patent/US8131934B2/en active Active
-
2011
- 2011-10-11 CY CY20111100972T patent/CY1112472T1/el unknown
-
2012
- 2012-02-08 US US13/368,363 patent/US8516195B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| ES2368682T3 (es) | 2011-11-21 |
| US8131934B2 (en) | 2012-03-06 |
| EP2229620A1 (en) | 2010-09-22 |
| JP5052678B2 (ja) | 2012-10-17 |
| CN101911013B (zh) | 2013-07-31 |
| US8516195B2 (en) | 2013-08-20 |
| US20110131382A1 (en) | 2011-06-02 |
| ATE516538T1 (de) | 2011-07-15 |
| WO2009087160A1 (en) | 2009-07-16 |
| CN101911013A (zh) | 2010-12-08 |
| IL206848A0 (en) | 2010-12-30 |
| US20090182942A1 (en) | 2009-07-16 |
| EP2229620B1 (en) | 2011-07-13 |
| KR20100106444A (ko) | 2010-10-01 |
| BRPI0906424B1 (pt) | 2020-10-20 |
| CA2701093A1 (en) | 2009-07-16 |
| SI2229620T1 (sl) | 2011-10-28 |
| PL2229620T3 (pl) | 2011-12-30 |
| IL206848A (en) | 2014-03-31 |
| PT2229620E (pt) | 2011-10-06 |
| CA2701093C (en) | 2016-10-11 |
| KR101231562B1 (ko) | 2013-02-12 |
| JP2011509475A (ja) | 2011-03-24 |
| DK2229620T3 (da) | 2011-09-05 |
| CY1112472T1 (el) | 2015-12-09 |
| US20120137073A1 (en) | 2012-05-31 |
| US7870339B2 (en) | 2011-01-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B11A | Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing | ||
| B04C | Request for examination: application reinstated [chapter 4.3 patent gazette] | ||
| B06F | Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette] | ||
| B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
| B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
| B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 20/10/2020, OBSERVADAS AS CONDICOES LEGAIS. |